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  • Discussion

    Import Logo Locked

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    Latest over 6 years ago
    by Wild
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    How to change a dummy via into not on a net status?

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    Started over 6 years ago
    by luanvn81
  • Discussion

    Need to generate the stacked via reports ( L1_L3 ).

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    6 replies
    Latest over 6 years ago
    by cdlep
  • Discussion

    Inner layer jumpers Locked

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    Latest over 6 years ago
    by cdlep
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    Design Entry Locked

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    6 replies
    Latest over 6 years ago
    by FrankieWY
  • Discussion

    Can't Creating a Find Result Report as CSV File Locked

    1888 views
    3 replies
    Latest over 6 years ago
    by ITING
  • Discussion

    Why flash symbols in padstack? Locked

    17380 views
    5 replies
    Latest over 6 years ago
    by CadAce2K
  • Discussion

    ORCAD 17.4 STD Edition "Unable to export a .brd file to Specctra" WHY IS THAT ??????? Locked

    704 views
    0 replies
    Started over 6 years ago
    by excellon1
  • Discussion

    Design Rule check grayed out in Orcad 16.6 Locked

    14601 views
    1 reply
    Latest over 6 years ago
    by Wild
  • Discussion

    How to solve the problem INFO(ORCAP-2242): Checking Incorrect Pin Group Assignment Locked

    5478 views
    3 replies
    Latest over 6 years ago
    by Jejiji
  • Discussion

    Forcing an NC pin to connect to a net Locked

    15548 views
    2 replies
    Latest over 6 years ago
    by Fredda
  • Discussion

    Chiplet Interface for Heterogeneous SiP

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    1 reply
    Latest over 6 years ago
    by William Martin
  • Discussion

    unassigned nets Locked

    15209 views
    4 replies
    Latest over 6 years ago
    by masamasa
  • Discussion

    Component Device Pin Number Mismatch; Cannot Replace Locked

    17746 views
    4 replies
    Latest over 6 years ago
    by EASiA
  • Discussion

    Metadata Locked

    13954 views
    2 replies
    Latest over 6 years ago
    by EASiA
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