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Forum - Thread List
  • Discussion

    Taking the derivative produces a strange line plot Locked

    16196 views
    4 replies
    Latest over 14 years ago
    by yannisuno
  • Discussion

    How to create a plot from a list when running Ocean script from CIW Locked

    14894 views
    4 replies
    Latest over 14 years ago
    by keble6
  • Discussion

    command line execution of the skill program. Locked

    14937 views
    1 reply
    Latest over 14 years ago
    by skillUser
  • Discussion

    "Library Manager" and details for Component Symbols (PCB Footprints) with Allegro/Orcad PCB Editor Locked

    1185 views
    0 replies
    Started over 14 years ago
    by Gigy
  • Discussion

    A question about auCdl - nlSetPcellName ...? Locked

    2207 views
    2 replies
    Latest over 14 years ago
    by Prabhu The ICL
  • Discussion

    How to override netlisting mapping of instance names and node names? Locked

    16212 views
    3 replies
    Latest over 14 years ago
    by Andrew Beckett
  • Discussion

    envRegSetTrigger() & environment customization Locked

    1063 views
    3 replies
    Latest over 14 years ago
    by Andrew Beckett
  • Discussion

    How to know the inst = car(selectedSet()) is running in stretch mode or not ? Locked

    976 views
    1 reply
    Latest over 14 years ago
    by Andrew Beckett
  • Discussion

    via pad sizes changed following up-rev of very old design Locked

    12980 views
    2 replies
    Latest over 14 years ago
    by K2J4
  • Discussion

    calculator expressions for MOS Vth by max gm method Locked

    17131 views
    3 replies
    Latest over 14 years ago
    by keble6
  • Discussion

    Which node is controlling the timestep? Locked

    14799 views
    2 replies
    Latest over 14 years ago
    by swdesigner
  • Discussion

    How to use skill to change PCell parameter like using Edit Instance Properties to change parameter ? Locked

    20379 views
    9 replies
    Latest over 14 years ago
    by Charley Chen
  • Discussion

    Is it possible to check signal at a node inside chip after fibrication? Locked

    13692 views
    2 replies
    Latest over 14 years ago
    by tkhan
  • Discussion

    PCB? Locked

    12402 views
    0 replies
    Started over 14 years ago
    by hadimotamedi
  • Discussion

    FPGA PCB design considerations Locked

    13721 views
    2 replies
    Latest over 14 years ago
    by Lambros
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