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Featured

What Is Zonal Architecture? And Why Is it Upending the Automotive Supply Chain?

Earlier this week I wrote about the electric vehicle (EV) transition, how it is happening…

Paul McLellan
• 7 min read
ota , Automotive , tier-1 , featured , zonal architecture

The Automotive Electric Vehicle Transition

The only really interesting part of the automotive industry is the electric vehicle…

Paul McLellan
• 8 min read
Automotive , Electrification , featured , ev , nev

Richard Goering, 1952-2023

I have some sad news to report. Richard Goering passed away last month at the age…

Paul McLellan
• 3 min read
featured , Richard Goering , EETimes
Breakfast Bytes

Latest blogs

Cadence at DAC: Experts, Presentations, Lunches...and Denali Party Instructions

Cadence is doing a lot at DAC as usual. Here is a summary. But read it carefully…

• 4 min read
dac2016 , DAC , expert bar , Austin , Denali Party , dac53 , Lip-Bu Tan , Denali , 53dc , Breakfast Bytes

Bayern München Come to CDNLive EMEA

CDNLive EMEA is nominally held in Munich (München in German) but, in fact, is held…

• 5 min read
Munich , CDNLive , CDNLive EMEA , Breakfast Bytes , Bayern München

CDNLive: Design Technology Co-Optimization for N7 and N5

One of the challenges of developing a new node is that there are a lot of moving…

• 2 min read
n5 , Cadence Academic Network , CDNLive , lithography , CDNLive EMEA , imec , n7 , 5nm , 7nm , design of experiments , DTCO

Corporate Venture Capital for Semiconductor Start-Ups

A couple of weeks ago, Silicon Catalyst organized an evening panel about corporate…

• 5 min read
Intel , Applied Materials , cypress semiconductor , SanDisk , silicon catalyst , Qualcomm , corporate venture capital , wilson sonsini , corporate vc , Breakfast Bytes

CDNLive: Ericsson Paving the Way for 5G

At CDNLive EMEA in Munich this week, there were two keynotes. The first was by Tom…

• 3 min read
5G , CDNLive EMEA , Ericsson

DAC: One Month and Counting

It is May already and just a month until DAC. I am sure that you already know that…

• 3 min read
dac2016 , DAC , Austin , dac53 , Design Automation Conference , 53dac

Embedded Vision: The Road Ahead for Neural Networks and Five Likely Surprises

It is the Embedded Vision Summit. Every year this event gets bigger, reflecting the…

• 3 min read
Low Power , Rowen , Embedded Vision Summit , Vision P6 , tensilica vision p6 , Tensilica , convolutional neural nets , high performance , neural nets , Breakfast Bytes

New Algorithms for Vision Require a New Processor

Vision is everywhere. If you look at the number of sensors that are shipped, then…

• 3 min read
recognition , tensilica vision p6 , Tensilica , vision , convolutional neural networks , neural networks , CNN

NVIDIA: Ten Months of Emulation on Palladium, Hours to Bring-Up

NVIDIA just released their next-generation GPU architecture called Pascal and a brand…

• 2 min read
palladium z1 , NVIDIA , Palladium , Palladium XP , Emulation , Breakfast Bytes

EDPS Cyber Security Workshop: "Don't Let Convenience Trump Security"

EDPS, the Electronic Design Process Symposium, always has the second of the two days…

• 4 min read
security , Monterey , chris eagle , EDPS , cyber security , naval postgraduate school , Breakfast Bytes

FD-SOI: Can I Design It and Manufacture It?

Yesterday I covered the analysis by ARM and VLSI Research on FD-SOI from the symposium…

• 4 min read
28 FD-SOI , Samsung , VSLI Research , GlobalFoundries , ARM , FD-SOI

FD-SOI: Is It Really a Thing?

Apparently, asking if something is really a thing is really a thing. So, recently…

• 8 min read
FinFET , GlobalFoundries , ARM , FD-SOI

Patents and Standards, Managing the Challenge

One challenge with standards is the desire to avoid unknowingly incorporating patents…

• 5 min read
vlsi technology , Rambus , ieee patent policy , GSM , loa , patent , IEEE-SA , IEEE , letter of assurance , Breakfast Bytes , standard

Andrew Kahng on PPAC Scaling Below 7nm

Last week Dr. Andrew Kahng came to town. He was at CDNLive, where his presentation…

• 5 min read
ucsd , roadmap , ITRS , Cadence Academic Network , kahng , andrew kahng , 5nm , 7nm , power

Phil Moorby and the History of Verilog

Last Saturday there was a gala event at the Computer History Museum in Mountain View…

• 6 min read
verilog-xl , gateway design automation , SystemVerilog , Gateway , Phil Moorby , Verilog , computer history museum , chm

Ann Winblad Masterclass

Normally the Stanford VLAB meets in Menlo Park, but occasionally they make a foray…

• 5 min read
ann winblad , vlab , hummer winblad , venture capital

Open Server Summit: How to Install 5,000 Servers Per Day

There are only a few end markets for semiconductors that really drive the technology…

• 6 min read
Open Server Summit , servers , datacenter

"Interoperability is the Only Way to Prove Standards Compliance"

At the recent TSMC Technology Symposium, Cadence and Mellanox demonstrated multi…

• 3 min read
pcie 4.0 , data center , PHY , mellanox , PCIe , mobile , PCI Express

Memory in China: XMC

Yesterday I covered the first half of the CASPA meeting last Saturday about memory…

• 4 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

Memory, the Turning Point of Chinese Semiconductor Industry

I can't keep away from work. Saturday found me in the Cadence auditorium for the…

• 5 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

TI and UI: Texas Instruments' Experience with the Common User Interface

Cadence's tools Genus, Innovus, and Tempus have a lot of functionality in common…

• 3 min read
Genus , Tempus , Joules , Voltus , Innovus , Bob Sussman , Texas Instruments , TI , Breakfast Bytes , common UI

Qualcomm Looks to the Future: Steve Mollenkopf's CDNLive Keynote

Steve Mollenkopf, the CEO of Qualcomm Incorporated, gave one of the keynotes at CDNLive…

• 4 min read
mollenkopf , CDNLive , IoT , Qualcomm , Internet of Things , drone , mobile , Snapdragon , CDNLive Silicon Valley , ARM , datacenter , Breakfast Bytes

Jim Hogan and the Early Days of Virtuoso

I had lunch with Jim last week to get a little color on the early days of the Virtuoso…

• 3 min read
Hogan , james spoto , national , Virtuoso , daisy systems , chipmaster , Jim Hogan , SDA , SKILL

AdaptIP Talk About Their High-Level Synthesis Approach at CDNLive

At this year's CDNLive, AdaptIP presented their experiences with high-level synthesis…

• 4 min read
802.11ah , CDNLive , adaptip , Stratus , viterbi decoder , high level synthesis , CDNLive Silicon Valley , FFT , HLS , Breakfast Bytes

Tom Beckley's CDNLive Keynote: Addressing Complexity and Safety Challenges

Tom Beckley gave the final keynote before lunch here at CDNLive in Silicon Valley…

• 3 min read
Virtuoso Variation Option , Virtuoso ADE Verifier , Tom Beckley , CDNLive , CDNLive Silicon Valley 2016 , Virtuoso , CDNLive Silicon Valley , Virtuoso ADE Explorer , Virtuoso ADE Assembler , Breakfast Bytes

Mobile Unleashed...and Reviewed

I finished reading Don Dingee and Dan Nenni's book, Mobile Unleashed, the Origin…

• 5 min read
Apple , Simon Segars , Samsung , Qualcomm , mobile , ARM processors , ARM

Happy 25th Birthday, Virtuoso!

There are a lot of changes going on in the environment in which analog design gets…

• 5 min read
Virtuoso Variation Option , Virtuoso ADE Verifier , Virtuoso , analog design , Virtuoso ADE Explorer , Virtuoso ADE Assembler , Breakfast Bytes

A Brief History of Cadence: the Present Day

In the early days, like all the larger EDA companies, Cadence grew through a mixture…

• 3 min read
cadence , startups , history , SDA , acquisitions
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