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Featured

Why LLMs Are the Best Thing to Happen to Chip Design

By Kartik Hegde, Sr. Engineering Group Director We live in a world increasingly…

Corporate
Corporate 29 Sep 2026 • 7 min read
featured , chip design , AGI , LLMs

Shift Verification Left: AI Tools for Faster, Smarter Chip Design

Originally written by Hamid Shojaei, Co-Founder of ChipStack and now Distinguished…

RobbieOSullivan
RobbieOSullivan 23 Mar 2026 • 7 min read
ChipStack , featured , EDA , ChipStack AI Super Agent , AI

Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
Corporate 19 Jun 2025 • less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium
Verification
Latest blogs

Synthesis Really DOES Need to Change

A great article appeared in Chip Design a few weeks ago written by Tets Maniwa, …

archive 2 Jun 2009 • 2 min read
System Design and Verification , rtl compiler , C-to-Silicon Compiler

Inside Cadence: "Stars & Strikes" charity event

Allow me to make a brief digression from EDA technology blogging to give you all…

jvh3 28 May 2009 • 1 min read
Functional Verification , charity benefit , Stars and Strikes festival

Where's the Bridge to Cross the Great Divide?

At this year's Embedded System Conference in San Jose there was a panel with the…

jasona 28 May 2009 • 8 min read
windows , dwarfdump , VMware , Embedded Systems Conference 2009 , ISX , Hardware/software co-verification , linux

New "E" text editor and e templates

Imagine Team Specman's surprise when we came across this article on Slashdot about…

teamspecman 27 May 2009 • 1 min read
IEEE 1647 , eclipse , Specman , Functional Verification , e , AMIQ , verification , IES-XL

Report from CDNLive! EMEA 2009

CDNLive! in Munich had it all - stimulating customer papers, demonstrations of new…

tomacadence 21 May 2009 • 1 min read
ABV , CDNLive , Functional Verification , OVM , VIP , TLA , MDV

Tech Tip: Weighting Generation of "Extreme" Values

[ Team Specman welcomes guest blogger Vitaly Lagoon, an Architect in the Generation…

teamspecman 21 May 2009 • 1 min read
IntelliGen , Specman , Verification methodology , Functional Verification , Incisive , e , team specman , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP , IES-XL

Heads-up: DVClub Boston Coming Up On June 1

Back on March 19 here in Silicon Valley, verification guru Brian Bailey gave a great…

jvh3 20 May 2009 • less than a min read
events , verification strategy , Functional Verification , DVClub

Way Worse Than The Real Thing

This week Cadence and Virtutech announced a collaborative effort to bring together…

TeamESL 18 May 2009 • 2 min read
cdnlive! emea 2009 , System Design and Verification , Incisive Enterprise Simulator , embedded software , Incisive , Coverage Driven Verification for Embedded Software , embedded SW engineer , ISX , Hardware/software co-verification , ESL , architect , Virtutech , Coverage Driven Verification

ESL Verification News From CDNLive! EMEA

Hello from CDNLive! EMEA in Munich. Another year has passed, and it’s time…

Steve Brown 18 May 2009 • less than a min read
System Design and Verification , Incisive Enterprise Simulator , Incisive , SystemC analysis , System simulation and analysis , Coverage Driven Verification for Embedded Software , SystemC , Incisive Software Extensions , Hardware/software co-verification , debugging , ESL , Virtutech , Coverage Driven Verification

System D&V at CDNLive! EMEA

CDNLive! EMEA has started today. I arrived here (Munich Germany) from SFO paying…

Ran Avinun 18 May 2009 • 1 min read
System Design and Verification , Palladium , xtreme , Virtutech

5 min Demo: e Coding With AMIQs DVT IDE

For those of you who can't make it to the CDNLive Munich Designer Expo this week…

teamspecman 18 May 2009 • less than a min read
IEEE 1647 , eclipse , Specman , CDNLive , Functional Verification , e , team specman , specman elite , AMIQ

SystemC Debug: A Summary of Summary Probes

SystemC goes well beyond generic C and C++ to provide a number of semantic constructs…

TeamESL 15 May 2009 • 5 min read
Verification planning and management , TLM , System Design and Verification , System simulation and analysis , debugging , ESL , verification

e Shareware on OVMWorld.org and Cadence Community Sites

As our loyal readers know, we on Team Specman works hard to include code examples…

teamspecman 14 May 2009 • 1 min read
IEEE 1647 , Specman , Functional Verification , OVM e , vr_ad , e , team specman , OVMWorld , verification

ISX Presentations at CDNLive! Munich

As we head into next weeks CDNLive! event in Munich it's great to see today's post…

jasona 13 May 2009 • 1 min read
cdnlive! emea 2009 , System Design and Verification , ISX

IEEE P1647-2010 Call For Participation

Attention Specmaniacs: the IEEE 1647 working group is looking for a few additional…

teamspecman 12 May 2009 • 2 min read
IEEE 1647 , Specman , Functional Verification' signal integrity , OVM e , e , OVM-e , eRM , AOP

CDNLive Munich Guide for Specmaniacs

Good news for Specmaniacs based in the EU: next week from May 18-20 is the annual…

teamspecman 11 May 2009 • 3 min read
Specman , CDNLive , Functional Verification , Cadence VIP portfolio , OVM , OVM e , e , Mike Stellfox , techtorial

Modeling Interfaces with C-to-Silicon Compiler

Users of ESL tools are curious about the procedure for handling the interface to…

TeamESL 7 May 2009 • 2 min read
CTOS , System Design and Verification , TLM 2.0 , SystemC analysis , C-to-Silicon , transaction level modeling , high level synthesis , Modeling , HLS , dma

Tracing TLM 2.0 Activity in an ESL Design – Part 3

Last time I discussed how to use –sctlmrecord to produce an SST2 database of TLM…

georgef 7 May 2009 • 7 min read
TLM , simvision , System Design & Verification , ESL

e Coding Made Easy with the “DVT” Integrated Development Environment

Specmaniacs everywhere should be aware of a great, full-featured integrated development…

teamspecman 6 May 2009 • 6 min read
IEEE 1647 , SystemVerilog , eclipse , Specman , CDNLive , Functional Verification , OVM , OVM e , OVM SV , e , specman elite , AMIQ , eRM

It's Not Too Early to Think About DAC 2009

Even though it's still a couple of months off, it's not too early to think about…

jasona 6 May 2009 • 1 min read
DAC 2009 , System Design and Verification , hardware-dependent software

OSCI Launches Video Tutorials for TLM 2.0

Cadence is one of the sponsors of a series of Open SystemC Initiative (OSCI) TLM…

Steve Brown 5 May 2009 • less than a min read
Intel , System Design and Verification , OSCI , TLM 2.0 , SystemC , interoperability , Modeling

Using Macros for Repetitive Coding Tasks

For this post welcome guest blogger Hilmar van der Kooij. Hilmar is a Cadence Application…

teamspecman 4 May 2009 • 5 min read
Specman , Functional Verification , tech tips , OVM , OVM e , Coverage-Driven Verification , team specman , Aspect Oriented Programming , macros , AOP

Some SystemC Perspectives - An Interview with Vincent Motel

I sat down with Vincent Motel recently, a long time Cadence employee, and one of…

Steve Brown 30 Apr 2009 • 7 min read
OVM , C-to-Silicon , System Design & Verification , SystemC: OCSI

Performance-Aware e Coding Guidelines – Part 5

In this last segment of the series on performance-aware coding, allow me to share…

teamspecman 28 Apr 2009 • 2 min read
IEEE 1647 , performance , events , Specman , Functional Verification , API , tech tips , OVM , OVM e , e , temporal expressions , OVM-e , specman elite , IES , IES-XL

Quick Tip - New Home For the "SVM" Docs

FAQs: What happened to the "SVM" documentation, and to SVM in general? Has SVM been…

teamspecman 24 Apr 2009 • 1 min read
IPCM , Functional Verification , OVM , SVM , Incisive , eRM

CtoS support of Multiple Clocks

In a previous blog entry we discussed C-to-Silicon’s (CtoS’s) ability to support…

TeamESL 20 Apr 2009 • less than a min read
High-Level Synthesis , CTOS , clock , System Design & Verification , SystemC , C-to-Silicon Compiler , clocking

Totally Off Topic: It's A Girl!

Allow me to digress from EDA subjects to herald the birth of my first child! …

jvh3 20 Apr 2009 • less than a min read
baby , Functional Verification , team specman , girl

Embedded Software on the Virtual Platform: Analog or Digital?

One of the things I learned when Verisity purchased Axis was the difference in mindset…

jasona 17 Apr 2009 • 4 min read
Specman , virtual platform , System Design and Verification , analog , Enterprise Manager , waveform , functional coverage , ISX , check pointing , Jason Andrews
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