Custom IC Design

Latest Posts

Discussion

DRC License Error

Category: Custom IC Design

By legolas

$usertype
•
updated over 8 years ago by Andrew Beckett

3 replies • 15852 views
Discussion

Transient simulation of a crystal oscillator

Category: Custom IC Design

By PeppeW90

$usertype
•
updated over 8 years ago by Tawna

1 replies • 17693 views
Discussion

SRAM Design

Category: Custom IC Design

By Naina123

$usertype
•
started over 8 years ago

0 replies • 14893 views
Discussion

Standard Cell Libraries (Basic)

Category: Custom IC Design

By AndreyVolk

$usertype
•
updated over 8 years ago by AndreyVolk

2 replies • 6520 views
Discussion

Phase Margin Calculation

Category: Custom IC Design

By netbug

$usertype
•
updated over 8 years ago by Andrew Beckett

1 replies • 16987 views
Discussion

Error running DRC on Assura - "The Assura DRC Run Failed"

Category: Custom IC Design

By fanelli

$usertype
•
updated over 8 years ago by fanelli

2 replies • 2758 views
Discussion

creating custom cell

Category: Custom IC Design

By asetji

$usertype
•
started over 8 years ago

0 replies • 14005 views
Discussion

problem simulating a sub-circuit (spectre model) with ade

Category: Custom IC Design

By asetji

$usertype
•
updated over 8 years ago by asetji

3 replies • 16125 views
Discussion

VerilogA vs. built-in device models

Category: Custom IC Design

By samer1

$usertype
•
updated over 8 years ago by samer1

2 replies • 14212 views
Discussion

How to avoid compiling Verilog/sytemVerilog views every time you netlist (AMS)?

Category: Custom IC Design

By iguerra

$usertype
•
updated over 8 years ago by Andrew Beckett

3 replies • 3689 views
Discussion

cds_get_analog_value or cgav is not correct

Category: Custom IC Design

By nthoangga

$usertype
•
updated over 8 years ago by Andrew Beckett

1 replies • 14490 views
Discussion

MDL: create a new waveform and save it into a wavefile

Category: Custom IC Design

By PatrikOsgnach

$usertype
•
updated over 8 years ago by Andrew Beckett

1 replies • 14564 views
Discussion

Monte Carlo analysis with vprbs

Category: Custom IC Design

By Mirco Controller

$usertype
•
updated over 8 years ago by Andrew Beckett

1 replies • 14214 views
Discussion

tdnoise or pnoise?

Category: Custom IC Design

By PeppeW90

$usertype
•
updated over 8 years ago by Andrew Beckett

5 replies • 15677 views
Discussion

Verilog-A model equivalent to primitive model?

Category: Custom IC Design

By greatqs

$usertype
•
updated over 8 years ago by greatqs

3 replies • 16156 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.