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Custom IC Design

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  • Discussion

    Issues with vector stimulus and spectre

    Category: Custom IC Design

    By itos

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    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 22237 views
  • Discussion

    desVar interdependencies in maestro

    Category: Custom IC Design

    By Ymmen

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    •

    updated over 3 years ago by Andrew Beckett

    5 replies • 11276 views
  • Discussion

    [ CCSChangeTrace]change default style and thickness of waveform/trace in ViVA XL-- Does NOT work for expression plot.

    Category: Custom IC Design

    By RFStuff

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    updated over 3 years ago by Andrew Beckett

    1 replies • 4264 views
  • Discussion

    How to plot waveforms in a particular order in WaveScan (ViVA)

    Category: Custom IC Design

    By RFStuff

    $usertype

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    updated over 3 years ago by FormerMember

    3 replies • 11414 views
  • Discussion

    AMS simulation error: "ncsim: *F, INTERR: INTERNAL EXCEPTION"

    Category: Custom IC Design

    By LIUYI

    $usertype

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    updated over 3 years ago by LIUYI

    3 replies • 4214 views
  • Discussion

    Removing the Visibility eye and the corner name from my results

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 3 years ago by Senan

    2 replies • 9599 views
  • Discussion

    How to undo an action in ADE Assembler?

    Category: Custom IC Design

    By Giulio Puccioni

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    updated over 3 years ago by Andrew Beckett

    3 replies • 12568 views
  • Discussion

    Recovering the deleted Symbol

    Category: Custom IC Design

    By SrujanPat2000

    $usertype

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    updated over 3 years ago by SrujanPat2000

    2 replies • 10250 views
  • Discussion

    Changing the legend position in the Cadence results

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 3 years ago by Senan

    5 replies • 12053 views
  • Discussion

    Files getting locked

    Category: Custom IC Design

    By RakeshPRG

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 14328 views
  • Discussion

    DAC Verification (ENOB, SFDR, DNL, INL, THD measure)

    Category: Custom IC Design

    By Dali Lai

    $usertype

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    updated over 3 years ago by Andrew Beckett

    3 replies • 14540 views
  • Discussion

    Error while simulating a project on ADE(XL)

    Category: Custom IC Design

    By FaisalShahzad

    $usertype

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    updated over 3 years ago by XiongliangLai

    6 replies • 14981 views
  • Discussion

    Exporting statistical corner to different test of the same circuit

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 3 years ago by Senan

    2 replies • 10411 views
  • Discussion

    Save Assembler output setup to csv with "Description" column?

    Category: Custom IC Design

    By StephanWeber

    $usertype

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    updated over 3 years ago by StephanWeber

    5 replies • 2587 views
  • Discussion

    Remote-Host Simulation in ADE-L (or ADE Assembler) Does Not End

    Category: Custom IC Design

    By DrSeo

    $usertype

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    updated over 3 years ago by DrSeo

    1 replies • 10846 views
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