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Custom IC Design

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  • Discussion

    spectre error (64bit/32bit) on linux

    Category: Custom IC Design

    By Karev11

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    updated over 9 years ago by Andrew Beckett

    3 replies • 4786 views
  • Discussion

    Spectre: Possible to avoid "dangling node" removal when using "deepprobe" elements?

    Category: Custom IC Design

    By dontpanic

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    updated over 9 years ago by dontpanic

    2 replies • 5131 views
  • Discussion

    Simple Controlling of 20V path from 5V in cadence spectre

    Category: Custom IC Design

    By Hayderuet

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    started over 9 years ago

    0 replies • 13201 views
  • Discussion

    Importing .slib file(symbols) to Cadence library

    Category: Custom IC Design

    By Eduard Raines

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    updated over 9 years ago by Eduard Raines

    2 replies • 3252 views
  • Discussion

    parametric analysis of mos

    Category: Custom IC Design

    By haneen

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    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 13788 views
  • Discussion

    Spice Text for subcircuit in virtuoso

    Category: Custom IC Design

    By Lilas

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    updated over 9 years ago by Frank Wiedmann

    1 replies • 16962 views
  • Discussion

    Abstract Generator locking files error abs-11024

    Category: Custom IC Design

    By MoMiner1870

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    •

    updated over 9 years ago by MoMiner1870

    2 replies • 13966 views
  • Discussion

    Nyquist stability test using stb analysis

    Category: Custom IC Design

    By DCashen

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    updated over 9 years ago by DCashen

    5 replies • 19805 views
  • Discussion

    Why doing overunder without GROW increases HPN/FPN values?

    Category: Custom IC Design

    By dummyfill

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    updated over 9 years ago by Andrew Beckett

    3 replies • 1359 views
  • Discussion

    how to overwrite veriloga code in cadence

    Category: Custom IC Design

    By black tea

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    updated over 9 years ago by Andrew Beckett

    3 replies • 14899 views
  • Discussion

    Monte Carlo simulation for device mismatch

    Category: Custom IC Design

    By sdineshkumar

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    updated over 9 years ago by Andrew Beckett

    18 replies • 30816 views
  • Discussion

    pnoise broken?

    Category: Custom IC Design

    By itos

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    started over 9 years ago

    0 replies • 13499 views
  • Discussion

    Defining a VerilogA function in C-code referring to several shared libraries

    Category: Custom IC Design

    By Herge

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    updated over 9 years ago by Herge

    1 replies • 14118 views
  • Discussion

    Large Scale Simulation

    Category: Custom IC Design

    By HS88

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    updated over 9 years ago by Andrew Beckett

    1 replies • 14033 views
  • Discussion

    SFDR in Cadence

    Category: Custom IC Design

    By black tea

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    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 14761 views
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