• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Generate SDF for custom digital layout

    Category: Custom IC Design

    By anmos

    $usertype

    •

    updated over 7 years ago by anmos

    2 replies • 15678 views
  • Discussion

    Ideal differential mixer model in rflib

    Category: Custom IC Design

    By Thorin

    $usertype

    •

    updated over 7 years ago by sudip

    2 replies • 16013 views
  • Discussion

    memristors

    Category: Custom IC Design

    By bindu madhavi

    $usertype

    •

    started over 7 years ago

    0 replies • 13719 views
  • Discussion

    VIVA waveform colors/types

    Category: Custom IC Design

    By Steve Mikes

    $usertype

    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 4074 views
  • Discussion

    ADE L netlister to stop at cell name match rather than view name match

    Category: Custom IC Design

    By SatendraMaurya

    $usertype

    •

    updated over 7 years ago by SatendraMaurya

    2 replies • 14148 views
  • Discussion

    Sweeping of variable with step as expression

    Category: Custom IC Design

    By Nicolas Callens

    $usertype

    •

    updated over 7 years ago by Andrew Beckett

    1 replies • 16679 views
  • Discussion

    Assembler Run Plan: enforcing runs to sequence correctly

    Category: Custom IC Design

    By Cra1g

    $usertype

    •

    updated over 7 years ago by Dimitra Papazoglou

    4 replies • 17325 views
  • Discussion

    how to reduce power in post layout simulation

    Category: Custom IC Design

    By jayakandpal

    $usertype

    •

    started over 7 years ago

    0 replies • 13918 views
  • Discussion

    Pin mismatch between Symbols and Schematics

    Category: Custom IC Design

    By anurans

    $usertype

    •

    updated over 7 years ago by Quek

    1 replies • 17370 views
  • Discussion

    Characterizing cells with verilog-A models for components

    Category: Custom IC Design

    By farhan89

    $usertype

    •

    started over 7 years ago

    0 replies • 14662 views
  • Discussion

    Changing the number of series instances in a schematic

    Category: Custom IC Design

    By MoHas

    $usertype

    •

    updated over 7 years ago by MoHas

    9 replies • 24903 views
  • Discussion

    Voltus: how to generate the "DFII Layer Map File"?

    Category: Custom IC Design

    By dontpanic

    $usertype

    •

    updated over 7 years ago by Saloni Chhabra

    6 replies • 9418 views
  • Discussion

    avoiding ams re-gen and re-compile the netlist database

    Category: Custom IC Design

    By DavidLou

    $usertype

    •

    updated over 7 years ago by DavidLou

    2 replies • 15362 views
  • Discussion

    Stream out GDS excluding selected cells

    Category: Custom IC Design

    By Cambridge Lv

    $usertype

    •

    updated over 7 years ago by Cambridge Lv

    2 replies • 2236 views
  • Discussion

    changing the location of netlist creation in loop

    Category: Custom IC Design

    By Suryansh Singh

    $usertype

    •

    updated over 7 years ago by Suryansh Singh

    2 replies • 14374 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information