Custom IC Design

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Discussion

Is it possible to also save phase information for the gain transfer function in noise analysis?

Category: Custom IC Design

By NourSeif
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updated over 4 years ago by NourSeif

2 replies • 10596 views
Discussion

calcVal failure: Job log says some outputs used by Calcval have failed, but they haven't.

Category: Custom IC Design

By Ernesto1
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updated over 4 years ago by Ernesto1

4 replies • 2455 views
Discussion

Unable to plot from ADE Assembler results tab

Category: Custom IC Design

By unSkilled
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updated over 4 years ago by Andrew Beckett

3 replies • 12861 views
Discussion

Edit schematic with python

Category: Custom IC Design

By darylpan
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updated over 4 years ago by Andrew Beckett

1 replies • 12759 views
Discussion

APS++ for AMS mode (NOT in spectre mode)

Category: Custom IC Design

By RFStuff
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updated over 4 years ago by RFStuff

2 replies • 10651 views
Discussion

Model parameters clarity

Category: Custom IC Design

By shashwatss
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updated over 4 years ago by Andrew Beckett

1 replies • 11792 views
Discussion

How can I solve the "ERROR (VIVA-9000)" ?

Category: Custom IC Design

By ichiro
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updated over 4 years ago by ichiro

6 replies • 5016 views
Discussion

parasitic extraction on "updated" schematics

Category: Custom IC Design

By life
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updated over 4 years ago by FormerMember

1 replies • 1167 views
Discussion

Any bindkey to run "netlist -> recreate"?

Category: Custom IC Design

By sjwprcker
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updated over 4 years ago by sjwprcker

4 replies • 1430 views
Discussion

Suppress: *WARNING* COMBINE attribute library not defined

Category: Custom IC Design

By Aldo2
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updated over 4 years ago by Andrew Beckett

18 replies • 23128 views
Discussion

ADE Explorer - Spec Pass/Fail

Category: Custom IC Design

By life
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updated over 4 years ago by life

1 replies • 2230 views
Discussion

Update W/L number in instance property, but resistor "r "value isn't change accordingly

Category: Custom IC Design

By ringamp
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updated over 4 years ago by ringamp

2 replies • 2147 views
Discussion

Can I use a variable as interpolation point in the value function?

Category: Custom IC Design

By maaz2020
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updated over 4 years ago by maaz2020

5 replies • 13970 views
Discussion

Verilog-AMS Simulation speed issue while using $table_model for reading from a file.

Category: Custom IC Design

By RFStuff
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updated over 4 years ago by Andrew Beckett

1 replies • 10486 views
Discussion

How to pass a real array as an input argument to a function in Verilog (in AMS simulation)

Category: Custom IC Design

By RFStuff
•
updated over 4 years ago by RFStuff

2 replies • 11776 views

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