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Custom IC Design

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  • Discussion

    wait a long time to have results updated

    Category: Custom IC Design

    By sjwprcssw

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    started 5 days ago

    0 replies • 131 views
  • Discussion

    SOA analysis in cadence virtuoso

    Category: Custom IC Design

    By TUKA

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    started 6 days ago

    0 replies • 121 views
  • Discussion

    Strategy for Accelerating Full-Chip AMS Simulation with Multi-Rate Clocks (1kHz / 100MHz)

    Category: Custom IC Design

    By HY202510149941

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    updated 7 days ago by Alonso Schmidt

    1 replies • 287 views
  • Discussion

    Buses in spectreText when creating symbol

    Category: Custom IC Design

    By MC20250412421

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    •

    updated 7 days ago by MC20250412421

    2 replies • 282 views
  • Discussion

    Does Cadence provide a standard Python API for tool automation?

    Category: Custom IC Design

    By WM20250906725

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    •

    updated 11 days ago by Andrew Beckett

    5 replies • 2166 views
  • Discussion

    Issue with Skywater 130 Monte Carlo Mismatch Analysis

    Category: Custom IC Design

    By VLSI lab IITB

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    •

    updated 12 days ago by VLSI lab IITB

    2 replies • 414 views
  • Discussion

    Issue with the ADE Explorer/Assembler simulator

    Category: Custom IC Design

    By GL202502244954

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    •

    started 12 days ago

    0 replies • 143 views
  • Discussion

    Date/time (or $system) in verilogA

    Category: Custom IC Design

    By leok

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    •

    updated 14 days ago by leok

    2 replies • 227 views
  • Discussion

    quantus parasitic extraction vs. SKY130 PDK

    Category: Custom IC Design

    By GS202507021424

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    •

    updated 16 days ago by Andrew Beckett

    2 replies • 1269 views
  • Discussion

    Quantus Error – Sky130 qrcTechFile not recognized as valid technology file

    Category: Custom IC Design

    By RK202509013321

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    updated 16 days ago by Andrew Beckett

    1 replies • 435 views
  • Discussion

    Stop Condition of Liberate trio in characterizing a DFF

    Category: Custom IC Design

    By TN202507027633

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    •

    updated 18 days ago by Guangjun Cao

    1 replies • 293 views
  • Discussion

    Noise Results from Transient Noise Simulation and Noise Simulation

    Category: Custom IC Design

    By Kenny Lu

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    updated 18 days ago by Kenny Lu

    6 replies • 923 views
  • Discussion

    Virtuoso and Allegro Compatibility

    Category: Custom IC Design

    By forXTer

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    •

    updated 24 days ago by Saloni Chhabra

    1 replies • 357 views
  • Discussion

    IC25.1 Virtuoso crash but the simulation is still on going

    Category: Custom IC Design

    By sjwprcssw

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    •

    started 26 days ago

    0 replies • 340 views
  • Discussion

    How do you draw a parametrized layout of an inverter ?

    Category: Custom IC Design

    By MC20250412421

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    •

    started 27 days ago

    0 replies • 296 views
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