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Custom IC Design

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  • Discussion

    Analysis (stb): phase plots shows reversal i.e. phase plot starting from 0 degree

    Category: Custom IC Design

    By BitanMallik BitanMallik

    •

    updated over 1 year ago by Frank Wiedmann

    1 replies • 4343 views
  • Discussion

    load skill file without starting Virtuoso but use Virtuoso API.

    Category: Custom IC Design

    By Maple Oven Maple Oven

    •

    updated over 1 year ago by RobMan

    1 replies • 4137 views
  • Discussion

    Mismatch current Parameters for 65nm TSMC technology

    Category: Custom IC Design

    By Phd SA88 Phd SA88

    •

    updated over 1 year ago by DomiHammerfall

    1 replies • 5162 views
  • Discussion

    Error loading OCEAN scripts in nograph mode - strcat: argument #1 should be either a string or a symbol (type template = "S") - nil

    Category: Custom IC Design

    By shridmaster shridmaster

    •

    updated over 1 year ago by shridmaster

    4 replies • 2901 views
  • Discussion

    how to export clock crossing to file

    Category: Custom IC Design

    By Karev11 Karev11

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3848 views
  • Discussion

    Spice sub-circuit in the schematic editor

    Category: Custom IC Design

    By Bakr Abdelgaliel Bakr Abdelgaliel

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 4230 views
  • Discussion

    vcvs has a wrong gain in montecarlo simulation

    Category: Custom IC Design

    By zuiying zuiying

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3982 views
  • Discussion

    MOSFET dimension in schematic and LVS mismatch in TSMC 180nm I/O library

    Category: Custom IC Design

    By JadeCircuit JadeCircuit

    •

    updated over 1 year ago by RobMan

    1 replies • 1360 views
  • Discussion

    rfTlineLib mlin non-physical behavior

    Category: Custom IC Design

    By TobyK TobyK

    •

    updated over 1 year ago by TobyK

    2 replies • 4184 views
  • Discussion

    Analysis on the extracted view

    Category: Custom IC Design

    By sidm sidm

    •

    updated over 1 year ago by Andrew Beckett

    6 replies • 5303 views
  • Discussion

    Negative time step with ADE_L transient simulation

    Category: Custom IC Design

    By ccsim ccsim

    •

    started over 1 year ago

    0 replies • 3622 views
  • Discussion

    DC sweep results do not match DC operating point results

    Category: Custom IC Design

    By Doronzzz Doronzzz

    •

    updated over 1 year ago by Frank Wiedmann

    2 replies • 4874 views
  • Discussion

    Eval error on MATLAB expressions from ADE/Maestro outputs

    Category: Custom IC Design

    By MichR MichR

    •

    updated over 1 year ago by Marc Heise

    6 replies • 2439 views
  • Discussion

    Remove update text on schematic?

    Category: Custom IC Design

    By kenc184 kenc184

    •

    updated over 1 year ago by Andrew Beckett

    4 replies • 4599 views
  • Discussion

    ADE Explorer Design Variables sweep sets

    Category: Custom IC Design

    By nfathy nfathy

    •

    updated over 1 year ago by nfathy

    3 replies • 5990 views
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