Custom IC Design

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Discussion

the same extraction view got netlisted differently in 2 different test setup

Category: Custom IC Design

By a048

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updated over 2 years ago by a048

3 replies • 6274 views
Discussion

re-use of impulse response models of n-ports

Category: Custom IC Design

By Ali Bastami

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updated over 2 years ago by Ali Bastami

3 replies • 7298 views
Discussion

DC Convergence issues with custom device model

Category: Custom IC Design

By sidm

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updated over 2 years ago by Andrew Beckett

5 replies • 8588 views
Discussion

Assembler Direct Plot add to outputs

Category: Custom IC Design

By Brad RFeng

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updated over 2 years ago by Brad RFeng

12 replies • 11657 views
Discussion

Multi-dimensional bus notation in Virtuoso Schematic Viewer

Category: Custom IC Design

By Nader Fathy

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updated over 2 years ago by Andrew Beckett

1 replies • 7184 views
Discussion

transient temperature plot

Category: Custom IC Design

By sjwprcker

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updated over 2 years ago by sjwprcker

4 replies • 7620 views
Discussion

Attaching Hspice model to a newly defined cell view

Category: Custom IC Design

By sidm

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updated over 2 years ago by sidm

4 replies • 7261 views
Discussion

vbit pattern

Category: Custom IC Design

By JHC

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updated over 2 years ago by ShawnLogan

1 replies • 7003 views
Discussion

Duplicated Virtuoso icons in taskbar

Category: Custom IC Design

By MichR

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updated over 2 years ago by MichR

2 replies • 6489 views
Discussion

Only a functional file was created after using generate in Verilog

Category: Custom IC Design

By RuihW

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updated over 2 years ago by Andrew Beckett

3 replies • 7237 views
Discussion

Input File for Vsource in Cadence Virtuoso

Category: Custom IC Design

By Maverick007

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updated over 2 years ago by Andrew Beckett

4 replies • 9127 views
Discussion

problem with CDF

Category: Custom IC Design

By Mdad

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updated over 2 years ago by Andrew Beckett

2 replies • 6643 views
Discussion

how to create lookup table VCVS in SPECTRE

Category: Custom IC Design

By Frank Cano

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updated over 2 years ago by Andrew Beckett

4 replies • 7753 views
Discussion

CUVHNF error in ams simulation

Category: Custom IC Design

By sjwprcker

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started over 2 years ago

0 replies • 5938 views
Discussion

Why VXL generates a pin with "1_" prefix?

Category: Custom IC Design

By kenc184

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updated over 2 years ago by kenc184

1 replies • 707 views

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