Custom IC Design

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Discussion

Regarding behavioural modelling of analog design

Category: Custom IC Design

By Analog Design
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updated over 14 years ago by Analog Design

2 replies • 13222 views
Discussion

hiSubEventShell() what is that?

Category: Custom IC Design

By fomin
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updated over 14 years ago by skillUser

1 replies • 13074 views
Discussion

How to plot my own data in cadence

Category: Custom IC Design

By loon
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updated over 14 years ago by loon

3 replies • 15773 views
Discussion

How to do analog modeling with verilog -A

Category: Custom IC Design

By Analog Design
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updated over 14 years ago by Andrew Beckett

1 replies • 535 views
Discussion

resistor pcell legs

Category: Custom IC Design

By Roughy
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updated over 14 years ago by Andrew Beckett

1 replies • 13104 views
Discussion

Mark Net Configuration

Category: Custom IC Design

By TjaartOpperman
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updated over 14 years ago by Adrian Nistor

4 replies • 14900 views
Discussion

Best way to set control bits in schematic simulation?

Category: Custom IC Design

By smthiid
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updated over 14 years ago by Frank Wiedmann

1 replies • 14481 views
Discussion

Cadence manuel

Category: Custom IC Design

By mozdas
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updated over 14 years ago by skillUser

3 replies • 13210 views
Discussion

Parse instance brackets in Ocean

Category: Custom IC Design

By BVT1
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updated over 14 years ago by skillUser

3 replies • 13462 views
Discussion

GDSII Reference Manual?

Category: Custom IC Design

By Zach
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updated over 14 years ago by StefanSL

2 replies • 16005 views
Discussion

Stream out - text getting dropped

Category: Custom IC Design

By newdaddy
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updated over 14 years ago by Marc Heise

1 replies • 1959 views
Discussion

Backward Compatible Skill Scripts

Category: Custom IC Design

By TjaartOpperman
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updated over 14 years ago by TjaartOpperman

3 replies • 13305 views
Discussion

Assura (ASSURA41USR1HF8_CDB) geomXor to same layer not allowed?

Category: Custom IC Design

By stuso
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updated over 14 years ago by Quek

7 replies • 14509 views
Discussion

IC6.1.4 cds_thru netlist problem

Category: Custom IC Design

By TjaartOpperman
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updated over 14 years ago by Andrew Beckett

1 replies • 13347 views
Discussion

No output was requested. (However, saving signal `vddd!'.)

Category: Custom IC Design

By naderi
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updated over 14 years ago by Andrew Beckett

1 replies • 5686 views

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