Custom IC Design

Latest Posts

Discussion

Bits as Inputs

Category: Custom IC Design

By girishmtech

$usertype
•
updated over 12 years ago by Andrew Beckett

5 replies • 16650 views
Discussion

schematic licenses usage

Category: Custom IC Design

By navi2582

$usertype
•
updated over 12 years ago by navi2582

2 replies • 13559 views
Discussion

Geometric wire options (VLE)

Category: Custom IC Design

By sPoK

$usertype
•
updated over 12 years ago by sPoK

4 replies • 14743 views
Discussion

Is there a way to recover an adexl view that's missing its data.sdb file?

Category: Custom IC Design

By 123deepa

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 2690 views
Discussion

Virtuoso Envlp Analysis Problem with Thermometer Waveform as Input

Category: Custom IC Design

By Richard85

$usertype
•
started over 12 years ago

0 replies • 13060 views
Discussion

Query in Naming in schematic and layout

Category: Custom IC Design

By BB11

$usertype
•
updated over 12 years ago by BB11

2 replies • 13269 views
Discussion

Design variables in FFT and THD measures

Category: Custom IC Design

By baenischfau

$usertype
•
updated over 12 years ago by baenischfau

4 replies • 15008 views
Discussion

Corner Simulation

Category: Custom IC Design

By YonYon

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 14661 views
Discussion

Assura DRC - round edges with geomSize() operation

Category: Custom IC Design

By PekkaH

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 872 views
Discussion

Changing instance model by alter statement

Category: Custom IC Design

By ChrisEAS

$usertype
•
updated over 12 years ago by Andrew Beckett

3 replies • 14200 views
Discussion

Regarding Transient analysis of Gate Charge

Category: Custom IC Design

By kapiljainwal

$usertype
•
updated over 12 years ago by kapiljainwal

2 replies • 13792 views
Discussion

How to plot device parameters from transient sims.

Category: Custom IC Design

By archive

$usertype
•
updated over 12 years ago by Andrew Beckett

6 replies • 17951 views
Discussion

Mixed Signal Simulation Question

Category: Custom IC Design

By brianzimmer

$usertype
•
updated over 12 years ago by Andrew Beckett

3 replies • 13760 views
Discussion

OSS netlister: how to avoid netlisting of parameter "m"

Category: Custom IC Design

By Andreasm

$usertype
•
started over 12 years ago

0 replies • 717 views
Discussion

verilog netlist to schematic

Category: Custom IC Design

By Myskill

$usertype
•
updated over 12 years ago by Andrew Beckett

3 replies • 15148 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.