Custom IC Design

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Virtuoso layout hierarchical copy contains mysterious residue from other libraries

Category: Custom IC Design

By chenyanw

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updated over 3 years ago by chenyanw

7 replies • 12638 views
Discussion

skip=cut inst=[...] statements being ignored

Category: Custom IC Design

By wignesb

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updated over 3 years ago by Andrew Beckett

3 replies • 1682 views
Discussion

Virtuoso Error

Category: Custom IC Design

By omiya

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updated over 3 years ago by Andrew Beckett

6 replies • 12000 views
Discussion

Printing out unconventional process-specific model parameter in ADE

Category: Custom IC Design

By MReza123

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updated over 3 years ago by MReza123

6 replies • 11207 views
Discussion

ams XCELIUM simulation pauses

Category: Custom IC Design

By Michael H

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updated over 3 years ago by amifsud

7 replies • 13529 views
Discussion

circuit prospector not finding structure

Category: Custom IC Design

By KurtKimber1

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updated over 3 years ago by KurtKimber1

2 replies • 9754 views
Discussion

AC Sim Output Setup Issues

Category: Custom IC Design

By greywanderer

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updated over 3 years ago by greywanderer

2 replies • 9665 views
Discussion

accepting 1st subckt definition when there are duplicate subckts

Category: Custom IC Design

By wignesb

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updated over 3 years ago by wignesb

4 replies • 10985 views
Discussion

Two Environment Setup Issues

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Kevin Buck

10 replies • 12837 views
Discussion

Simulation of voltage doubler

Category: Custom IC Design

By akmo

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updated over 3 years ago by John kaka

2 replies • 14428 views
Discussion

Overriding specifications with VAR("...") expressions

Category: Custom IC Design

By rod1

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updated over 3 years ago by Andrew Beckett

1 replies • 1091 views
Discussion

Can liberate use an encrypted hspice model?

Category: Custom IC Design

By sherryshe

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updated over 3 years ago by sherryshe

9 replies • 12604 views
Discussion

[SOI device]How to deal with the backgate pin (VBGP & VBGN) settings of devices with 5 terminals while running liberate?

Category: Custom IC Design

By sherryshe

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started over 3 years ago

0 replies • 1189 views
Discussion

It's the same problem as the person above. Please tell me the solution

Category: Custom IC Design

By chanho

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updated over 3 years ago by Andrew Beckett

1 replies • 607 views
Discussion

Transient simulation - adding noise after steady state

Category: Custom IC Design

By jehh

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updated over 3 years ago by Andrew Beckett

5 replies • 3942 views

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