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Custom IC Design

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  • Discussion

    oa2cdb translation

    Category: Custom IC Design

    By tkhan

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    •

    updated over 8 years ago by Andrew Beckett

    10 replies • 18017 views
  • Discussion

    RE: ADEXL parametric simulation scalar plot

    Category: Custom IC Design

    By kenambo

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    •

    updated over 8 years ago by kenambo

    2 replies • 14403 views
  • Discussion

    Layout Netlist and Topcell Netlist shows correct connections but LVS does not pass!!!

    Category: Custom IC Design

    By mehdina94rm

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    updated over 8 years ago by mehdina94rm

    2 replies • 17723 views
  • Discussion

    Should I use the PIN or the NET layer for gnd?

    Category: Custom IC Design

    By dpalomeq

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    •

    updated over 8 years ago by dpalomeq

    2 replies • 14054 views
  • Discussion

    License server

    Category: Custom IC Design

    By Milt

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    •

    updated over 8 years ago by Marc Heise

    1 replies • 14369 views
  • Discussion

    Pins are not annotated using subcircuit (netlist)

    Category: Custom IC Design

    By Johanny Saenz

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    •

    updated over 8 years ago by Johanny Saenz

    4 replies • 15498 views
  • Discussion

    Measure DNL/INL in ADE-XL

    Category: Custom IC Design

    By migrg

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    •

    updated over 8 years ago by migrg

    1 replies • 8928 views
  • Discussion

    dft error with a valid transient waveform

    Category: Custom IC Design

    By Aldo2

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    updated over 8 years ago by Aldo2

    4 replies • 14873 views
  • Discussion

    Problem in importing verilog netlist to cadence

    Category: Custom IC Design

    By Casp

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    •

    started over 8 years ago

    0 replies • 13764 views
  • Discussion

    Verilog-A, one time execution function

    Category: Custom IC Design

    By samer1

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    •

    updated over 8 years ago by samer1

    6 replies • 21017 views
  • Discussion

    scs files

    Category: Custom IC Design

    By samer1

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    •

    updated over 8 years ago by Quek

    6 replies • 25929 views
  • Discussion

    Exporting ADE-L Variables

    Category: Custom IC Design

    By netbug

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    •

    updated over 8 years ago by netbug

    6 replies • 14903 views
  • Discussion

    unwanted snapping in layout editor

    Category: Custom IC Design

    By huadel

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    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 16212 views
  • Discussion

    Using DC operating point calculated from spectre in APS Simualtion over Corners

    Category: Custom IC Design

    By Johanny Saenz

    $usertype

    •

    started over 8 years ago

    0 replies • 13569 views
  • Discussion

    What is license feature "Virtuoso_Spectre_GXL_MMSIM_Lk", and how to use it?

    Category: Custom IC Design

    By dontpanic

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    •

    updated over 8 years ago by dontpanic

    2 replies • 3864 views
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