Custom IC Design

Latest Posts

Discussion

Pin placement does not show up

Category: Custom IC Design

By Nicolas Callens

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 14059 views
Discussion

How to fix "*WARNING* file /home/Kaveri/CDS.log Malformed Lock-Stake file.", when running virtuoso?

Category: Custom IC Design

By Marben

$usertype
•
updated over 5 years ago by Marben

2 replies • 9445 views
Discussion

Is CDL netlist *.PININFO pin1:O pin2:I pin3:IO property a syntax requirement?

Category: Custom IC Design

By max123321

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 3354 views
Discussion

VerilogA

Category: Custom IC Design

By Suhas7

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13916 views
Discussion

spiceText view with AMS OSS netlister

Category: Custom IC Design

By RobinC

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 14867 views
Discussion

Input Capacitance Measurements of Digital Cells in Cadence Liberate

Category: Custom IC Design

By anurans

$usertype
•
updated over 5 years ago by anurans

8 replies • 17435 views
Discussion

Negative Power Numbers During the Synthesis Over a Custom Cell Library (Liberate)

Category: Custom IC Design

By anurans

$usertype
•
updated over 5 years ago by Guangjun Cao

2 replies • 15821 views
Discussion

I want a user manual for the switch in analoglib. where I can get this?

Category: Custom IC Design

By JAYDIP BISWAS

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 18752 views
Discussion

path appearing different within IC616 and IC618

Category: Custom IC Design

By jaylin

$usertype
•
updated over 5 years ago by jaylin

4 replies • 15183 views
Discussion

sp1tswitch equivalent for pac simulations

Category: Custom IC Design

By nicodega

$usertype
•
updated over 5 years ago by Andrew Beckett

6 replies • 15602 views
Discussion

Error with simulation in IC6.1.7-64b.78 with spectre15.1.0.284.isr1

Category: Custom IC Design

By shrubbroom

$usertype
•
updated over 5 years ago by shrubbroom

2 replies • 15371 views
Discussion

QRC stamp=2 with PVS LVS

Category: Custom IC Design

By RobinC

$usertype
•
updated over 5 years ago by RobinC

7 replies • 3311 views
Discussion

Running Cadence Virtuoso in command line without GUI

Category: Custom IC Design

By Naveen16

$usertype
•
updated over 5 years ago by Andrew Beckett

5 replies • 29740 views
Discussion

PVS-QRC: use of extracted Spice netlist with Spectre?

Category: Custom IC Design

By dontpanic

$usertype
•
updated over 5 years ago by Andrew Beckett

6 replies • 17109 views
Discussion

hbnoise noise figure

Category: Custom IC Design

By Franktgg

$usertype
•
updated over 5 years ago by Franktgg

4 replies • 17744 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.