Custom IC Design

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Discussion

DSPF file disregard in extracted simulation

Category: Custom IC Design

By ZoltanT

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updated over 5 years ago by ZoltanT

7 replies • 23406 views
Discussion

Compare two LEF files

Category: Custom IC Design

By Sherl

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updated over 5 years ago by Sherl

4 replies • 16053 views
Discussion

How to properly shutdown virtuoso?

Category: Custom IC Design

By chaujohnthan

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updated over 5 years ago by chaujohnthan

4 replies • 18073 views
Discussion

Spectre: is it possible to specify initial conditions for DSPF blocks?

Category: Custom IC Design

By dontpanic

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updated over 5 years ago by dontpanic

2 replies • 15204 views
Discussion

Determining the sings for the DC Operating Points in ADE XL

Category: Custom IC Design

By wgtkan

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updated over 5 years ago by wgtkan

2 replies • 14018 views
Discussion

Global net name mapping for spectre netlist

Category: Custom IC Design

By Amar Kumar

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updated over 5 years ago by Amar Kumar

2 replies • 15062 views
Discussion

Calculator stack--swap? dup?

Category: Custom IC Design

By smiff

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updated over 5 years ago by smiff

4 replies • 1478 views
Discussion

EvalType in Cadence ADEXL

Category: Custom IC Design

By NorNand

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updated over 5 years ago by Andrew Beckett

1 replies • 15472 views
Discussion

error during creating the netlist from layout using 45nm technolgy

Category: Custom IC Design

By vinod joshi

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updated over 5 years ago by Andrew Beckett

3 replies • 21897 views
Discussion

FreePDK15 setup/layout problem

Category: Custom IC Design

By Greeny

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updated over 5 years ago by Andrew Beckett

4 replies • 2695 views
Discussion

current measure statement

Category: Custom IC Design

By wbsm

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updated over 5 years ago by wbsm

2 replies • 14886 views
Discussion

Flicker Noise in Pnoise Analysis

Category: Custom IC Design

By Deepansh

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updated over 5 years ago by Andrew Beckett

3 replies • 15905 views
Discussion

Cannot plot most terminal currents (transient)

Category: Custom IC Design

By smiff

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updated over 5 years ago by smiff

3 replies • 14810 views
Discussion

Cadence Pegasus or PVS

Category: Custom IC Design

By Varun M J

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updated over 5 years ago by Andrew Beckett

1 replies • 17772 views
Discussion

Jop policy setting in ADEXL

Category: Custom IC Design

By NorNand

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updated over 5 years ago by NorNand

2 replies • 13907 views

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