Custom IC Design

Latest Posts

Discussion

Resistive-capacitive OTA bandpass filter for low frequency signal acquisition

Category: Custom IC Design

By subhajitdey20

$usertype
•
started over 5 years ago

0 replies • 13240 views
Discussion

How to get smooth and accurate output waveform without increasing simulation time

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 5 years ago by RFStuff

9 replies • 19153 views
Discussion

making ruler visible from higher hierarchy

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 5 years ago by FormerMember

2 replies • 7897 views
Discussion

ViVA ICADV18.1: Hide and unhide subwindows

Category: Custom IC Design

By hchan

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13015 views
Discussion

ADE Assembler - Changing the Maximum Jobs while a Run is In Progress

Category: Custom IC Design

By Tjaart

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 1912 views
Discussion

How to sweep multiple params and save the specific param selected from the circuit?

Category: Custom IC Design

By diffsland

$usertype
•
updated over 5 years ago by FormerMember

3 replies • 14822 views
Discussion

Launching ADE L failed

Category: Custom IC Design

By Chofield

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 16286 views
Discussion

How to save subckt parameters in Spectre

Category: Custom IC Design

By Dessai

$usertype
•
updated over 5 years ago by Dessai

2 replies • 14405 views
Discussion

How to create an output expression for given expression using aged and fresh results

Category: Custom IC Design

By noramirkh

$usertype
•
updated over 5 years ago by noramirkh

4 replies • 14792 views
Discussion

Hierarchical member access in VerilogA

Category: Custom IC Design

By DimitarT

$usertype
•
updated over 5 years ago by Andrew Beckett

6 replies • 16489 views
Discussion

Accessing power dissipation in a Verilog module

Category: Custom IC Design

By vksinghal

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13184 views
Discussion

Missing point in AMS simulation plot when the value of the consecutive points are same

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13191 views
Discussion

Return a string from user-defined function in VerilogA

Category: Custom IC Design

By DimitarT

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 15711 views
Discussion

Monte Carlo Ocean XL: Interrupting simulations in a script

Category: Custom IC Design

By Martyniuk

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13320 views
Discussion

technology file manager

Category: Custom IC Design

By skillEater

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 14983 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.