Custom IC Design

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Discussion

Simulation with CalcVal does not work in Global Optimization but it does in Single Run.

Category: Custom IC Design

By delgsy

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updated over 3 years ago by Andrew Beckett

1 replies • 8378 views
Discussion

What is the phase relation between Spectre PSS one period waveform and the corresponding PAC analysis

Category: Custom IC Design

By RFStuff

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updated over 3 years ago by RFStuff

2 replies • 8732 views
Discussion

Updated PDK Vth Delta

Category: Custom IC Design

By illaoi

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updated over 3 years ago by ShawnLogan

1 replies • 8339 views
Discussion

Simultaneous Variables Sweep from Data Files

Category: Custom IC Design

By illaoi

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started over 3 years ago

0 replies • 7365 views
Discussion

Monte Carlo Sampling Method

Category: Custom IC Design

By illaoi

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updated over 3 years ago by illaoi

4 replies • 15930 views
Discussion

Layout XL connectivity reducing LVS time

Category: Custom IC Design

By CSCNalu

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updated over 3 years ago by Alex Soyer

3 replies • 9142 views
Discussion

Copying layout from one view to the other with the connectivity information intact

Category: Custom IC Design

By sidm

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updated over 3 years ago by Alex Soyer

1 replies • 11940 views
Discussion

Load pull for differential circuit

Category: Custom IC Design

By Mariam HABIB

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updated over 3 years ago by ShawnLogan

1 replies • 9208 views
Discussion

Viva slow plotting speed.

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by ShawnLogan

2 replies • 9261 views
Discussion

Voltus-Fi batch command simulator option missing error

Category: Custom IC Design

By Alan Saldanha

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updated over 3 years ago by Alan Saldanha

1 replies • 8354 views
Discussion

ADC TEST

Category: Custom IC Design

By moham1982

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updated over 3 years ago by Andrew Beckett

1 replies • 9049 views
Discussion

Transient Noise Simulation gives the same transient results even though the noise spectrum of the noise sources are different.

Category: Custom IC Design

By delgsy

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updated over 3 years ago by ShawnLogan

2 replies • 10833 views
Discussion

How to make use of the symbol_noconn for dangling verilog bus ports without shorting them ?

Category: Custom IC Design

By Emulator

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updated over 3 years ago by Emulator

2 replies • 8653 views
Discussion

How to include a folder of modelfiles in Assembler/Maestro ?

Category: Custom IC Design

By HoWei

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started over 3 years ago

0 replies • 1096 views
Discussion

What is the purpose/function of having multiple Noise/Fred pairs in independent sources?

Category: Custom IC Design

By delgsy

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updated over 3 years ago by delgsy

5 replies • 3207 views

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