Custom IC Design

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Troubles Uploading Pictures on Forum

Category: Custom IC Design

By sgcad
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updated 4 months ago by Andrew Beckett

1 replies • 1277 views
Discussion

Why is Monte Carlo simulation not Cadence Virtuoso?

Category: Custom IC Design

By NU20250421937
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updated 4 months ago by NU20250421937

2 replies • 1388 views
Discussion

Verilog A VACOMP-2032: Parameter for port width leads to error.

Category: Custom IC Design

By MC20250412421
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updated 4 months ago by MC20250412421

7 replies • 2084 views
Discussion

Process Corner Simulation

Category: Custom IC Design

By CS27
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updated 4 months ago by Alonso Schmidt

1 replies • 1542 views
Discussion

Grouped arrays in Layout XL cannot be edited for size or spacing

Category: Custom IC Design

By GX202407164559
•
updated 4 months ago by henker

4 replies • 1867 views
Discussion

psd function argument questions

Category: Custom IC Design

By a048
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started 4 months ago

0 replies • 1218 views
Discussion

How to ensure the plot sequenc in viva consistent with the seqence in output setup

Category: Custom IC Design

By sjwprcssw
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updated 4 months ago by Volker T

1 replies • 1113 views
Discussion

cdf parameter values to simulation output file

Category: Custom IC Design

By Brad RFeng
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updated 4 months ago by Brad RFeng

3 replies • 1567 views
Discussion

I want to investigate single-event latchup (SEL) in inverters. How should I modify the Calibre rule deck to extract parasitic BJTs and resistances from the layout

Category: Custom IC Design

By TL202504097856
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updated 5 months ago by TL202504097856

2 replies • 1383 views
Discussion

Encountering Thermal-1501 in Legato Electrothermal Simulation

Category: Custom IC Design

By AB_1718053087553
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updated 5 months ago by AB_1718053087553

2 replies • 1498 views
Discussion

Facing "Segmentation Fault" error while trying to run Assura DRC for layout analysis.

Category: Custom IC Design

By AP202504073541
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updated 5 months ago by AP202504073541

5 replies • 937 views
Discussion

Import verilog with VDD, VSS, VNW & VPW

Category: Custom IC Design

By mzn ehv
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updated 5 months ago by Volker T

9 replies • 1878 views
Discussion

Bind Double Press Escape to geDeselectAllFig not effect

Category: Custom IC Design

By SimbaG
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updated 5 months ago by Andrew Beckett

3 replies • 1543 views
Discussion

How to implement the SimVision Expression Calculator with tcl

Category: Custom IC Design

By Chandru Dhandapani
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started 5 months ago

0 replies • 1746 views
Discussion

Insert cell only with layout no symbol view to schematic view.

Category: Custom IC Design

By SimbaG
•
updated 5 months ago by Andrew Beckett

1 replies • 1284 views

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