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Custom IC Design

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  • Discussion

    Issue in accessing PSF directory with ocean script.

    Category: Custom IC Design

    By dskang

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    updated over 3 years ago by FormerMember

    2 replies • 10529 views
  • Discussion

    Violations display in ADE L

    Category: Custom IC Design

    By FabioDiFazio

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    updated over 3 years ago by FabioDiFazio

    2 replies • 10583 views
  • Discussion

    bandwidth function in Virtuoso calculator

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    2 replies • 17010 views
  • Discussion

    Using existing maestro view

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    4 replies • 12105 views
  • Discussion

    OCEAN

    Category: Custom IC Design

    By IC clown

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    updated over 3 years ago by Andrew Beckett

    3 replies • 9919 views
  • Discussion

    some questions about pz analysis

    Category: Custom IC Design

    By zuiying

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    updated over 3 years ago by FormerMember

    1 replies • 13041 views
  • Discussion

    plotting Smith charts

    Category: Custom IC Design

    By dzakharian

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    updated over 3 years ago by Andrew Beckett

    15 replies • 26037 views
  • Discussion

    How does the correlation constraint "cc" affect the correlation of mismatch parameters

    Category: Custom IC Design

    By Matthew CG

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    updated over 3 years ago by Matthew CG

    2 replies • 2180 views
  • Discussion

    Models for components in sample lib

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    6 replies • 11788 views
  • Discussion

    Change default increment of deriv

    Category: Custom IC Design

    By Holz

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    updated over 3 years ago by FormerMember

    5 replies • 10634 views
  • Discussion

    How can I import verilog-A (.va) file in the cadence virtuoso?

    Category: Custom IC Design

    By yysunj

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    updated over 3 years ago by Andrew Beckett

    1 replies • 10269 views
  • Discussion

    PLL reference model for PSS+PNOISE

    Category: Custom IC Design

    By HoWei

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    updated over 3 years ago by FormerMember

    5 replies • 4010 views
  • Discussion

    Maestro - use other output as spec value.

    Category: Custom IC Design

    By JeyJey

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    updated over 3 years ago by JeyJey

    6 replies • 4333 views
  • Discussion

    How to plot current results along with last run results in the same window/tab in viva.

    Category: Custom IC Design

    By kenc184

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    updated over 3 years ago by kenc184

    4 replies • 4105 views
  • Discussion

    write *.scs file to use model library

    Category: Custom IC Design

    By mirtaji65

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    updated over 3 years ago by mirtaji65

    2 replies • 11774 views
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