Custom IC Design

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Discussion

Netlisting fine, but simulation fails: *Error* eval: unbound variable - currentFormSave

Category: Custom IC Design

By tito80

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updated over 12 years ago by Andrew Beckett

1 replies • 8782 views
Discussion

VHDL/Verilog simulation help in Virtuoso

Category: Custom IC Design

By Tejaswi

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started over 12 years ago

0 replies • 1330 views
Discussion

Error invoking virtuoso IC615

Category: Custom IC Design

By emax

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updated over 12 years ago by theopaone

1 replies • 13557 views
Discussion

Need to place a pin on the symbol for an internal VerilogA signal

Category: Custom IC Design

By boast

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updated over 12 years ago by boast

2 replies • 13884 views
Discussion

CDB to OA Conversion: Layout Issue

Category: Custom IC Design

By sebastion

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updated over 12 years ago by Andrew Beckett

11 replies • 19094 views
Discussion

Regarding stability sims (STB) --> Over corners STB phase plots shows reversal

Category: Custom IC Design

By kasj

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updated over 12 years ago by kasj

2 replies • 1518 views
Discussion

Generating .lib file from layout

Category: Custom IC Design

By govilv

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updated over 12 years ago by mariek

3 replies • 19679 views
Discussion

StreamOut StreamIn round-trip issue

Category: Custom IC Design

By MarceloR

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updated over 12 years ago by MarceloR

2 replies • 13593 views
Discussion

Out of memory error of Hiearchy Editor in ic5141

Category: Custom IC Design

By greatqs

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updated over 12 years ago by Andrew Beckett

1 replies • 13163 views
Discussion

ADE L: could not open logFiles during a parametric sweep on a transient simulation

Category: Custom IC Design

By apple419

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updated over 12 years ago by Andrew Beckett

3 replies • 15555 views
Discussion

Average power calculation

Category: Custom IC Design

By sagar2012

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updated over 12 years ago by Gangadhar Redd

2 replies • 30356 views
Discussion

automatically run a routine when run button is choose

Category: Custom IC Design

By NcfC

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updated over 12 years ago by NcfC

11 replies • 17695 views
Discussion

Global signals and spiceIn

Category: Custom IC Design

By kvntien

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updated over 12 years ago by Andrew Beckett

9 replies • 22160 views
Discussion

Netlisting problem in ADE-L: Empty ihnl/cds1,2,3,4

Category: Custom IC Design

By Asavanth

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updated over 12 years ago by Asavanth

1 replies • 3209 views
Discussion

pre-run script with two different analysis/ ADE-XL

Category: Custom IC Design

By Amer Samarah

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updated over 12 years ago by Andrew Beckett

1 replies • 14331 views

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