Custom IC Design

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Discussion

Generating a current waveform in Cadence

Category: Custom IC Design

By BaaB

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updated over 10 years ago by BaaB

2 replies • 15100 views
Discussion

Transient-Noise Analysis, problem with multiple run mode

Category: Custom IC Design

By Amir0098

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updated over 10 years ago by Amir0098

2 replies • 15403 views
Discussion

Problem with HSPICE Shooting Newton (SN) AC analysis in Cadence ADE

Category: Custom IC Design

By jdp721

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updated over 10 years ago by Andrew Beckett

1 replies • 15618 views
Discussion

how could i handle a dual-path PFD+CP structure when using noise aware PLL flow?

Category: Custom IC Design

By danglanggao

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updated over 10 years ago by Andrew Beckett

5 replies • 3554 views
Discussion

Using Subversion for Revision Control with Cadence

Category: Custom IC Design

By archive

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updated over 10 years ago by acook

9 replies • 22348 views
Discussion

ocnxlOutputExpr result wave - how to save to either csv or picture?

Category: Custom IC Design

By ChrHert

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started over 10 years ago

0 replies • 831 views
Discussion

Run ADE XL without netlisting each time

Category: Custom IC Design

By Nicusor

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updated over 10 years ago by rishi74

5 replies • 17875 views
Discussion

ADEXL model group

Category: Custom IC Design

By NoelCFC

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updated over 10 years ago by Andrew Beckett

1 replies • 15379 views
Discussion

input and output noise simulation with Spectre Noise analysis?

Category: Custom IC Design

By isazulkc

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updated over 10 years ago by Andrew Beckett

8 replies • 32233 views
Discussion

Monte Carlo mismatch on certain instance hierarchy level with Verilog-A model

Category: Custom IC Design

By nthoangga

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updated over 10 years ago by Andrew Beckett

1 replies • 14515 views
Discussion

Cell is not taking variable parameters

Category: Custom IC Design

By RFStuff

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updated over 10 years ago by RFStuff

2 replies • 14520 views
Discussion

Poly to poly capacitor in 0.18 process ?

Category: Custom IC Design

By inessadm

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updated over 10 years ago by Andrew Beckett

1 replies • 14338 views
Discussion

results browser in cadence visualization waveform tool

Category: Custom IC Design

By huadel

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updated over 10 years ago by Andrew Beckett

2 replies • 17040 views
Discussion

Error about extract CDF Parameters of CMOS into Layout

Category: Custom IC Design

By NGO TAN BINH

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updated over 10 years ago by Andrew Beckett

1 replies • 13902 views
Discussion

Switching technology for spectre netlist (Finfet to planar CMOS)

Category: Custom IC Design

By Antouan

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updated over 10 years ago by Andrew Beckett

1 replies • 14141 views

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