Custom IC Design

Latest Posts

Discussion

Sweeping component parameters for many components in ADE GXL

Category: Custom IC Design

By Kabal
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started over 11 years ago

0 replies • 12689 views
Discussion

Monte Carlo over swept oppoints

Category: Custom IC Design

By neuroAnalog
•
started over 11 years ago

0 replies • 12867 views
Discussion

Problem in reading-in in Spectre

Category: Custom IC Design

By SaeedR
•
updated over 11 years ago by Andrew Beckett

5 replies • 19123 views
Discussion

Grid spacing for 45nm GPDK process

Category: Custom IC Design

By madhanmo
•
started over 11 years ago

0 replies • 13399 views
Discussion

How to eliminate unused empty cells when importing GDS

Category: Custom IC Design

By marklin
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started over 11 years ago

0 replies • 13269 views
Discussion

pipo.log and strmOut.log

Category: Custom IC Design

By radiowaves
•
updated over 11 years ago by radiowaves

2 replies • 15004 views
Discussion

XL Layout issue with custom Library layout sourcing the Schematic.

Category: Custom IC Design

By JP Layout
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started over 11 years ago

0 replies • 12618 views
Discussion

freeze with virtuoso layout

Category: Custom IC Design

By Fabb
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updated over 11 years ago by Andrew Beckett

1 replies • 14818 views
Discussion

do stb analysis on five stage invter ring osc

Category: Custom IC Design

By xianweng
•
updated over 11 years ago by xianweng

3 replies • 14285 views
Discussion

Unable to run Monte Carlo ADEXL-1723

Category: Custom IC Design

By Faizalism
•
updated over 11 years ago by Andrew Beckett

3 replies • 13367 views
Discussion

How to do a parametric analysis for a model parameter ?

Category: Custom IC Design

By Ahmed Taha
•
updated over 11 years ago by FormerMember

2 replies • 14788 views
Discussion

How to define a binary matrix parameter in Verilog A

Category: Custom IC Design

By microstudent
•
updated over 11 years ago by microstudent

6 replies • 22440 views
Discussion

RLGC matrix size does not match between instance and model 'mtline'

Category: Custom IC Design

By SUEE
•
updated over 11 years ago by SUEE

2 replies • 7317 views
Discussion

How to set bindkeys of Virtuoso alignment window

Category: Custom IC Design

By microstudent
•
started over 11 years ago

0 replies • 14278 views
Discussion

Spectremdl and Verilog-A variable

Category: Custom IC Design

By dan9876
•
started over 11 years ago

0 replies • 12628 views

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