Custom IC Design

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Discussion

How to get the total area/length of a path with marknet ?

Category: Custom IC Design

By gnamde

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updated over 10 years ago by Andrew Beckett

4 replies • 3000 views
Discussion

where can I view OS support for cadence tools?

Category: Custom IC Design

By kainice

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updated over 10 years ago by Andrew Beckett

1 replies • 15960 views
Discussion

ADE XL simulation writing directory

Category: Custom IC Design

By jyang

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updated over 10 years ago by Andrew Beckett

1 replies • 15449 views
Discussion

**error** the memory request exceeds the current available space in hspice

Category: Custom IC Design

By sreeni

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updated over 10 years ago by Andrew Beckett

1 replies • 15912 views
Discussion

VerilogA Problem in MMSIM-7.1

Category: Custom IC Design

By gokce

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updated over 10 years ago by Andrew Beckett

36 replies • 32438 views
Discussion

Area calculation from layout in cadence 6.1.4

Category: Custom IC Design

By kpkp

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updated over 10 years ago by seaurchin

14 replies • 30158 views
Discussion

Reliability data disabled from ADE XL results

Category: Custom IC Design

By Amel

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updated over 10 years ago by Andrew Beckett

5 replies • 15925 views
Discussion

Question of Monte Carlo simulation of Virtuoso 6.1.5

Category: Custom IC Design

By bhl3302

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updated over 10 years ago by soa77

18 replies • 25918 views
Discussion

Ruler setup

Category: Custom IC Design

By tester

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updated over 10 years ago by Composter

12 replies • 25857 views
Discussion

Problem with simulating a circuit with spectre

Category: Custom IC Design

By dnelson

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updated over 10 years ago by dnelson

8 replies • 19032 views
Discussion

[ADE-L] Timed captab: "Results->Print->Capacitance Table" (and calculator "pv(...)" function) not working

Category: Custom IC Design

By dontpanic

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updated over 10 years ago by dontpanic

2 replies • 2987 views
Discussion

How to access captab results in calculator?

Category: Custom IC Design

By dontpanic

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updated over 10 years ago by dontpanic

2 replies • 15570 views
Discussion

ADE-XL simulation and save result

Category: Custom IC Design

By yhchang

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updated over 10 years ago by Andrew Beckett

3 replies • 14883 views
Discussion

Get hierarchical terminal name from cursor selection on schematic.

Category: Custom IC Design

By ddean

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updated over 10 years ago by ddean

2 replies • 14350 views
Discussion

finfet model card creator

Category: Custom IC Design

By Amira89

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updated over 10 years ago by Andrew Beckett

3 replies • 14605 views

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