Custom IC Design

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Discussion

VerilogA, one or the other parameter implementation

Category: Custom IC Design

By Emiel

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updated over 6 years ago by Emiel

4 replies • 14074 views
Discussion

"readns" cannot read state-file in DC Corner Simulation

Category: Custom IC Design

By Chenbt

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updated over 6 years ago by Andrew Beckett

1 replies • 1279 views
Discussion

Simulation with dspf_include

Category: Custom IC Design

By BrJaWr

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updated over 6 years ago by Andrew Beckett

1 replies • 14690 views
Discussion

Adding dummy elements to the layout

Category: Custom IC Design

By NorNand

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updated over 6 years ago by NorNand

4 replies • 18524 views
Discussion

Sprctre simulation with no schematic cells....

Category: Custom IC Design

By AllenD

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updated over 6 years ago by Andrew Beckett

1 replies • 13113 views
Discussion

Changing default editor within ADE

Category: Custom IC Design

By BrJaWr

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updated over 6 years ago by Andrew Beckett

3 replies • 14193 views
Discussion

PSS simulation

Category: Custom IC Design

By svilen

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updated over 6 years ago by JackieTheBanan

13 replies • 28351 views
Discussion

Model of Transient Noise Simulation in Cadence

Category: Custom IC Design

By Zhao Hui

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updated over 6 years ago by Andrew Beckett

3 replies • 13840 views
Discussion

Is there any tips & simulator settings to accelerate tran initial converge of ams top analog&digital simulation ?

Category: Custom IC Design

By Zest

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updated over 6 years ago by Andrew Beckett

2 replies • 1102 views
Discussion

Save subcircuit instance nets in ADE Assembler

Category: Custom IC Design

By NZimmermann

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updated over 6 years ago by NZimmermann

2 replies • 15697 views
Discussion

Abstract LEF files with Abstract generator

Category: Custom IC Design

By fengye

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updated over 6 years ago by fengye

2 replies • 15681 views
Discussion

"Assura has not been installed in this hierarchy" Error

Category: Custom IC Design

By nokta

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updated over 6 years ago by nokta

2 replies • 3618 views
Discussion

use output signals from other circuits as input for simulation

Category: Custom IC Design

By BaaB

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updated over 6 years ago by Andrew Beckett

3 replies • 15772 views
Discussion

Setting TimeStep for Transient simulations : defaulting to ps

Category: Custom IC Design

By HariV

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updated over 6 years ago by FormerMember

3 replies • 23306 views
Discussion

Dynamic nodesets on DC Sweeps

Category: Custom IC Design

By Johanny Saenz

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updated over 6 years ago by Andrew Beckett

1 replies • 13870 views

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