Custom IC Design

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Discussion

Quantizing sine wave

Category: Custom IC Design

By Farhan Ali 9216
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updated over 3 years ago by Andrew Beckett

4 replies • 14045 views
Discussion

Modifying/Editing Maestro/Assembler Test setup with text editor

Category: Custom IC Design

By greywanderer
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updated over 3 years ago by greywanderer

4 replies • 2632 views
Discussion

supported psf format different between IC617 and IC618?

Category: Custom IC Design

By kkdesbois
•
updated over 3 years ago by kkdesbois

2 replies • 10131 views
Discussion

Why pin object is converted to shape in Abstract generator

Category: Custom IC Design

By knowledgeseeker
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updated over 3 years ago by Andrew Beckett

1 replies • 9397 views
Discussion

How to find "file signature" of design files in Cadence Virtuoso (schematics, layouts, symbols, etc.)

Category: Custom IC Design

By Cocacola
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updated over 3 years ago by Andrew Beckett

6 replies • 2930 views
Discussion

Transient simulation termination by VerilogA model

Category: Custom IC Design

By Senan
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updated over 3 years ago by Senan

4 replies • 11787 views
Discussion

Verilog Error

Category: Custom IC Design

By Lemi
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updated over 3 years ago by Andrew Beckett

1 replies • 12207 views
Discussion

Layer Generation of Multiple Layers in Virtuoso

Category: Custom IC Design

By Tom Sawyer
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updated over 3 years ago by Andrew Beckett

10 replies • 13883 views
Discussion

clock buffer chain jitter measurement under deterministic supply noise

Category: Custom IC Design

By YutaoLiu
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updated over 3 years ago by FormerMember

7 replies • 13083 views
Discussion

Determine corner-dependent setting during operating point calculation with VerilogA model

Category: Custom IC Design

By FormerMember
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started over 3 years ago

0 replies • 3585 views
Discussion

Monte carlo simulation question

Category: Custom IC Design

By Holz
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updated over 3 years ago by Holz

2 replies • 9389 views
Discussion

how to plot THD against output voltage?

Category: Custom IC Design

By sahand1400
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updated over 3 years ago by FormerMember

7 replies • 12662 views
Discussion

Why there is no convergence in PSS and transient if I enable "Calculate initial conditions (ic) automatically"?

Category: Custom IC Design

By Clara Dong
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updated over 3 years ago by FormerMember

1 replies • 4137 views
Discussion

customize the CDL netlist

Category: Custom IC Design

By MReza123
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started over 3 years ago

0 replies • 10057 views
Discussion

Drawing in Layout XL

Category: Custom IC Design

By progster
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updated over 3 years ago by Marc Heise

1 replies • 9147 views

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