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Custom IC Design

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  • Discussion

    Can't probe terminal currents from symbols in PDK

    Category: Custom IC Design

    By mikewu mikewu

    •

    updated over 4 years ago by Andrew Beckett

    7 replies • 3544 views
  • Discussion

    AMS simulation using smartview extraction

    Category: Custom IC Design

    By HasanArd HasanArd

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 14482 views
  • Discussion

    CAS Incomplete Net problem

    Category: Custom IC Design

    By Senan Senan

    •

    updated over 4 years ago by Senan

    4 replies • 12773 views
  • Discussion

    Import logo to Virtuoso schematic Editor

    Category: Custom IC Design

    By Richardv Richardv

    •

    updated over 4 years ago by Pedro Cardoso

    6 replies • 17809 views
  • Discussion

    Accessing parametric set sweep results with referencing only the corresponding design point rather than each individual parameter value

    Category: Custom IC Design

    By Naci Naci

    •

    updated over 4 years ago by Naci

    2 replies • 11488 views
  • Discussion

    Debugging slowness in expression evaluation in ADE

    Category: Custom IC Design

    By Naci Naci

    •

    updated over 4 years ago by Naci

    3 replies • 11675 views
  • Discussion

    DRC Error

    Category: Custom IC Design

    By Hossein Eslahi Hossein Eslahi

    •

    updated over 4 years ago by antoniadm

    1 replies • 12010 views
  • Discussion

    Saving the results of the Monte Carlo simulation with the Spectre Netlist scripting

    Category: Custom IC Design

    By Jafar Shamsi Jafar Shamsi

    •

    updated over 4 years ago by Jafar Shamsi

    5 replies • 12963 views
  • Discussion

    Displaying value in ADE Explorer Outputs without generating a plot

    Category: Custom IC Design

    By mikewu mikewu

    •

    updated over 4 years ago by mikewu

    3 replies • 14319 views
  • Discussion

    How to save inherited pin current in ADE Assembler using AMS simulator

    Category: Custom IC Design

    By LukeAndrew LukeAndrew

    •

    started over 4 years ago

    0 replies • 11330 views
  • Discussion

    Delay and bandwidth calculation for analog signals in Cadence

    Category: Custom IC Design

    By Farnaz Farnaz

    •

    updated over 4 years ago by Farnaz

    2 replies • 12913 views
  • Discussion

    Using a filter model of arbitrary poles and zeros in ADE

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 12224 views
  • Discussion

    Voltus-Fi PDB File Location

    Category: Custom IC Design

    By phill1127 phill1127

    •

    started over 4 years ago

    0 replies • 10873 views
  • Discussion

    Continuing a sim from a previous instant

    Category: Custom IC Design

    By mnagaraj mnagaraj

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 10390 views
  • Discussion

    Partial LVS check

    Category: Custom IC Design

    By Senan Senan

    •

    updated over 4 years ago by Senan

    2 replies • 11315 views
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