Custom IC Design

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Discussion

Exporting several DC sweeps (OP transistor params) to CSV in an organized way

Category: Custom IC Design

By rod1
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updated over 3 years ago by FormerMember

4 replies • 11898 views
Discussion

Trim Methodology in Maestro Assembler. The trim value is out of range and the cross() function returns no value. How can I get the trim value as "min" or "max"

Category: Custom IC Design

By IceTea
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updated over 3 years ago by IceTea

5 replies • 4100 views
Discussion

VXL and inherited connections?z

Category: Custom IC Design

By kenc184
•
updated over 3 years ago by kenc184

1 replies • 1250 views
Discussion

Suppression of vias not required in VXL?

Category: Custom IC Design

By kenc184
•
updated over 3 years ago by kenc184

2 replies • 8809 views
Discussion

Location of VXL user guide please

Category: Custom IC Design

By kenc184
•
updated over 3 years ago by kenc184

2 replies • 10601 views
Discussion

is there a way to change the design for multiple tests simultaneously?

Category: Custom IC Design

By delgsy
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updated over 3 years ago by delgsy

2 replies • 9242 views
Discussion

License issue while plotting outputs

Category: Custom IC Design

By Hao Guo
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updated over 3 years ago by Hao Guo

5 replies • 10199 views
Discussion

tags in VXL layout

Category: Custom IC Design

By kenc184
•
updated over 3 years ago by kenc184

2 replies • 6457 views
Discussion

Simulation of encrypted spectre netlist

Category: Custom IC Design

By analogdesign
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updated over 3 years ago by Andrew Beckett

1 replies • 10078 views
Discussion

Accessing waveform generated by a maestro expression in Matlab using adeInfo

Category: Custom IC Design

By michael10
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updated over 3 years ago by Andrew Beckett

1 replies • 9143 views
Discussion

Problem with systemVerilog netlister in IC618 which stops with cryptical message on a digital schematics in Virtuoso

Category: Custom IC Design

By Emulator
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updated over 3 years ago by Emulator

2 replies • 10628 views
Discussion

How to clear the DRC warning highlights from my layout

Category: Custom IC Design

By Senan
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updated over 3 years ago by Senan

2 replies • 11440 views
Discussion

Import Data to Cadence

Category: Custom IC Design

By Julinshah
•
updated over 3 years ago by Andrew Beckett

7 replies • 21778 views
Discussion

Parameterizing PSP model card parameters, for ADE parametric Analysis

Category: Custom IC Design

By araol
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updated over 3 years ago by Andrew Beckett

3 replies • 9693 views
Discussion

ADE Datasheet Generation Problems

Category: Custom IC Design

By SteveDobbs
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started over 3 years ago

0 replies • 8212 views

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