Custom IC Design

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Discussion

Simulate accumulted jitter spectral density vs. unit jitter spectral density in a ring VCO

Category: Custom IC Design

By threepwood06

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updated over 4 years ago by FormerMember

3 replies • 12577 views
Discussion

Ocean script for printing parametric sweep dcOp

Category: Custom IC Design

By Nader Fathy

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updated over 4 years ago by Nader Fathy

8 replies • 17429 views
Discussion

Connect bus to GND via resistors for simulation

Category: Custom IC Design

By ealaiporpi

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updated over 4 years ago by Andrew Beckett

3 replies • 12688 views
Discussion

ISF Function Extraction in Cadence Virtuoso

Category: Custom IC Design

By asrf

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updated over 4 years ago by Maryem

17 replies • 29022 views
Discussion

copy only one layer in order to connect nets by name

Category: Custom IC Design

By hesaliveJim

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updated over 4 years ago by hesaliveJim

2 replies • 12271 views
Discussion

How to integrate a full-custom designed layout with a semi-custom designed microprocessor.

Category: Custom IC Design

By Thommandram

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updated over 4 years ago by Andrew Beckett

5 replies • 15363 views
Discussion

Question on Sampled (JItter) PNoise analysis

Category: Custom IC Design

By YutaoLiu

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updated over 4 years ago by FormerMember

1 replies • 13599 views
Discussion

How to get a value as an output to an expression

Category: Custom IC Design

By paulinho

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updated over 4 years ago by FormerMember

2 replies • 14098 views
Discussion

Plotting A Line Graph Across Design Points in ACTIMES Tran

Category: Custom IC Design

By Le Rouret

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updated over 4 years ago by Le Rouret

2 replies • 12187 views
Discussion

How can I add suffix for subcircuit with $ in cdl netlist

Category: Custom IC Design

By morrris

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started over 4 years ago

0 replies • 10882 views
Discussion

How can I create this switch at cadence virtuoso?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by Andrew Beckett

1 replies • 13544 views
Discussion

How can I generate this repeating pulse?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by yysunj

4 replies • 13626 views
Discussion

How to remove highlight after DRC check in IC Layout design

Category: Custom IC Design

By Senan

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updated over 4 years ago by Andrew Beckett

5 replies • 14088 views
Discussion

Getting the wellpin in lef using abstract

Category: Custom IC Design

By djknight

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updated over 4 years ago by Andrew Beckett

1 replies • 10814 views
Discussion

preparation for verifying large blocks

Category: Custom IC Design

By ichiro

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updated over 4 years ago by FormerMember

8 replies • 13284 views

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