Custom IC Design

Latest Posts

Discussion

Monte carlo simulation error (no process variations were specified in the statistics block)

Category: Custom IC Design

By Afshin Amoo
•
updated over 4 years ago by Afshin Amoo

2 replies • 14798 views
Discussion

oppoint using verilog a

Category: Custom IC Design

By Yea Chul
•
updated over 4 years ago by Andrew Beckett

2 replies • 11822 views
Discussion

plotting loop gain in ADE Assembler

Category: Custom IC Design

By robert 21
•
updated over 4 years ago by Andrew Beckett

4 replies • 13827 views
Discussion

implement noise behavior of transistor in spice code in spectre

Category: Custom IC Design

By Bo Yu
•
updated over 4 years ago by Andrew Beckett

3 replies • 12907 views
Discussion

CCCS - controlling element not available

Category: Custom IC Design

By shlomo34
•
updated over 4 years ago by shlomo34

4 replies • 3724 views
Discussion

Built-in aging model in TSMC PDK

Category: Custom IC Design

By FormerMember
•
updated over 4 years ago by Andrew Beckett

3 replies • 4717 views
Discussion

ADE XL Monte Carlo analysis: statistical results are not available

Category: Custom IC Design

By Mike Tian
•
updated over 4 years ago by KhanAmir

25 replies • 30551 views
Discussion

Reading IC5033 schematic in IC6.1.6 ?

Category: Custom IC Design

By Anon481
•
updated over 4 years ago by Andrew Beckett

4 replies • 11487 views
Discussion

Dac verilog ams output FFT plot issue

Category: Custom IC Design

By sidm
•
updated over 4 years ago by sidm

9 replies • 13411 views
Discussion

Instancing schematics in veriloga (or any other analog HDL)

Category: Custom IC Design

By BillH314
•
started over 4 years ago

0 replies • 10458 views
Discussion

issue with extracted s parameter from EMX intergrand

Category: Custom IC Design

By tawsaras
•
updated over 4 years ago by Andrew Beckett

1 replies • 11420 views
Discussion

How can I solve ERROR (SFE-23) at my circuit simulaton?

Category: Custom IC Design

By yysunj
•
updated over 4 years ago by yysunj

8 replies • 20696 views
Discussion

About DC op point and DC sweep

Category: Custom IC Design

By ichiro
•
updated over 4 years ago by Andrew Beckett

1 replies • 11214 views
Discussion

How to store all actual values into layout cells

Category: Custom IC Design

By leok
•
started over 4 years ago

0 replies • 10296 views
Discussion

Problem defining REGION plot with DCsweep in ADE EXPLORER

Category: Custom IC Design

By robert 21
•
started over 4 years ago

0 replies • 10200 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.