Custom IC Design

Latest Posts

Discussion

GNT library for Virtuoso

Category: Custom IC Design

By kevin998x

$usertype
•
updated over 5 years ago by Frank Wiedmann

3 replies • 14168 views
Discussion

Disable specific instances or nets within a subcell of a testbench

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 5 years ago by Andrew Beckett

4 replies • 9671 views
Discussion

alter option

Category: Custom IC Design

By KOTB

$usertype
•
updated over 5 years ago by KOTB

6 replies • 17027 views
Discussion

Using $table_model in verilogA for finding current for a given temperature

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 5 years ago by RFStuff

2 replies • 14284 views
Discussion

Can Liberate take encrypted spice netlist

Category: Custom IC Design

By KC Lee

$usertype
•
updated over 5 years ago by Guangjun Cao

2 replies • 14277 views
Discussion

staircase function

Category: Custom IC Design

By vvdb

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 18045 views
Discussion

Failed to create netlist when simulating extracted view

Category: Custom IC Design

By wgtkan

$usertype
•
updated over 5 years ago by Andrew Beckett

5 replies • 33328 views
Discussion

How can I hide cell name of components in schematic?

Category: Custom IC Design

By BaaB

$usertype
•
updated over 5 years ago by BaaB

4 replies • 17103 views
Discussion

Change properties of text

Category: Custom IC Design

By BaaB

$usertype
•
updated over 5 years ago by Andrew Beckett

7 replies • 17774 views
Discussion

Is it possible to re-use generated DSPF when using Smartviews to reduce simulation time?

Category: Custom IC Design

By dontpanic

$usertype
•
updated over 5 years ago by dontpanic

2 replies • 13273 views
Discussion

Use of CCCSCreateWaveCSV.il for csv file having multiple coulmns (more than two)

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 5 years ago by RFStuff

2 replies • 13043 views
Discussion

Ploting schematic without showing component parameters

Category: Custom IC Design

By rickrevolta

$usertype
•
updated over 5 years ago by Andrew Beckett

12 replies • 23435 views
Discussion

Check output signals during simulation time

Category: Custom IC Design

By BaaB

$usertype
•
updated over 5 years ago by Andrew Beckett

5 replies • 16480 views
Discussion

Graphics woes while working remotely from home

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 5 years ago by CADcasualty

9 replies • 16382 views
Discussion

Update wont pick up changes

Category: Custom IC Design

By wgtkan

$usertype
•
updated over 5 years ago by Quek

1 replies • 13201 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.