Custom IC Design

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Discussion

fsdb file not refreshed during simulation

Category: Custom IC Design

By Karev11

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updated over 5 years ago by Andrew Beckett

2 replies • 17333 views
Discussion

ADE L plotting error: vector::_M_range_check

Category: Custom IC Design

By ZoltanT

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updated over 5 years ago by Andrew Beckett

1 replies • 1598 views
Discussion

Some DRC errors regarding SP and DP

Category: Custom IC Design

By annieglez92

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updated over 5 years ago by annieglez92

2 replies • 14793 views
Discussion

Conversion of old Simulation Files

Category: Custom IC Design

By JavadBa

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updated over 5 years ago by JavadBa

4 replies • 14719 views
Discussion

plotting waveVsWave across corner+global variable sweep in ADEXL

Category: Custom IC Design

By dzakharian

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started over 5 years ago

0 replies • 1508 views
Discussion

double tail comparator input refered offset voltage measured using cadence

Category: Custom IC Design

By nkataria

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updated over 5 years ago by sypetre

8 replies • 19522 views
Discussion

Spectre S-parameter analysis

Category: Custom IC Design

By cADEUser

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updated over 5 years ago by Andrew Beckett

12 replies • 39146 views
Discussion

How do I load parametric analysis results in ADE L again to plot

Category: Custom IC Design

By Nader Fathy

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updated over 5 years ago by Nader Fathy

4 replies • 19186 views
Discussion

Export Netlist with VerilogA subblock when there is no ADE license

Category: Custom IC Design

By quyleanh

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updated over 5 years ago by quyleanh

8 replies • 17342 views
Discussion

fsdb to pwl

Category: Custom IC Design

By KOTB

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updated over 5 years ago by Andrew Beckett

4 replies • 19174 views
Discussion

Unreadable font in cdshelp

Category: Custom IC Design

By SharksFan

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updated over 5 years ago by LukeAndrew

11 replies • 20470 views
Discussion

How to access Metal enclosures over Via

Category: Custom IC Design

By Utkarsh03

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started over 5 years ago

0 replies • 14053 views
Discussion

Display Instance name in Layout

Category: Custom IC Design

By KishanCh

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updated over 5 years ago by Andrew Beckett

6 replies • 19415 views
Discussion

Porting a design from one technology to another (even the finished layout)

Category: Custom IC Design

By FormerMember

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updated over 5 years ago by Andrew Beckett

4 replies • 4726 views
Discussion

Worst case delay measurement

Category: Custom IC Design

By Aalelai

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updated over 5 years ago by Andrew Beckett

3 replies • 16763 views

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