Custom IC Design

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Discussion

IEEE-like spec on CDBA and OA

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

2 replies • 14390 views
Discussion

x_count@techDerivedLayers : formal definition?

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

2 replies • 738 views
Discussion

How to edit dependent expression in ADEXL to represent specified corner sim result ?

Category: Custom IC Design

By sjwprc

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updated over 7 years ago by Andrew Beckett

4 replies • 15075 views
Discussion

psfxl warning, what it means?

Category: Custom IC Design

By Pyroblast

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updated over 7 years ago by evancox10

2 replies • 17004 views
Discussion

Convert schematic to Verilog file

Category: Custom IC Design

By Myskill

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updated over 7 years ago by Andrew Beckett

12 replies • 31719 views
Discussion

CDF doneProc callback no longer runs.

Category: Custom IC Design

By MatthewLove

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updated over 7 years ago by MatthewLove

2 replies • 13464 views
Discussion

how to activate Spec Markers in ADEXL Plotting Options ?

Category: Custom IC Design

By sjwprc

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updated over 7 years ago by sjwprc

4 replies • 14167 views
Discussion

Crude auto-layout SKILL to Virtuoso

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

2 replies • 13866 views
Discussion

Power MOSFET/IGBT in Cadence

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

3 replies • 3549 views
Discussion

NC-verilog Executable blank

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

2 replies • 14503 views
Discussion

Full OSSHNL error list

Category: Custom IC Design

By goofycat

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updated over 7 years ago by goofycat

4 replies • 15983 views
Discussion

RE: Electromigration SEB flow FIT calculation

Category: Custom IC Design

By kenambo

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updated over 7 years ago by Saloni Chhabra

3 replies • 14716 views
Discussion

ADE Explorer Real time tuning with schematic DC annotations

Category: Custom IC Design

By MatthewLove

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updated over 7 years ago by MatthewLove

2 replies • 14458 views
Discussion

Spectre simulation of verilogA file

Category: Custom IC Design

By Krishnaa

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updated over 7 years ago by Krishnaa

4 replies • 17009 views
Discussion

eyeDiagram() vs. Measurement --> Eye Diagram trigger period

Category: Custom IC Design

By HoWei

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updated over 7 years ago by HoWei

2 replies • 3621 views

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