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Custom IC Design

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    Cadence virtuoso version 6.2.145

    Category: Custom IC Design

    By VEVAD

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    updated over 7 years ago by Andrew Beckett

    3 replies • 16059 views
  • Discussion

    ADEXL 1921 error with IC616 on Debian

    Category: Custom IC Design

    By VLSIiitm

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    updated over 7 years ago by Johanny Saenz

    4 replies • 17141 views
  • Discussion

    Quarter-Circle in Layout without converting to polygon

    Category: Custom IC Design

    By akak

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    updated over 7 years ago by Andrew Beckett

    1 replies • 14107 views
  • Discussion

    running simulations on dedicatede SSD drive

    Category: Custom IC Design

    By magal

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    started over 7 years ago

    0 replies • 12863 views
  • Discussion

    ADE XL no jobs get started

    Category: Custom IC Design

    By marten

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    updated over 7 years ago by Andrew Beckett

    3 replies • 15305 views
  • Discussion

    Next line continuation in cds.lib

    Category: Custom IC Design

    By AliG1

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    updated over 7 years ago by Andrew Beckett

    1 replies • 13910 views
  • Discussion

    Jumper, Simulation MUX etc

    Category: Custom IC Design

    By itos

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    updated over 7 years ago by Marc Heise

    2 replies • 14191 views
  • Discussion

    How to simulate pnoise of fractional (non-integer) frequency divider

    Category: Custom IC Design

    By yino

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    updated over 7 years ago by yino

    2 replies • 14532 views
  • Discussion

    ADE XL Timed Out Running Monte Carlo Simulation

    Category: Custom IC Design

    By spaceradlab

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    updated over 7 years ago by Andrew Beckett

    3 replies • 14447 views
  • Discussion

    CDF instance information warning meaning

    Category: Custom IC Design

    By RVERP

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    updated over 7 years ago by Andrew Beckett

    1 replies • 13783 views
  • Discussion

    When does opening an ADE-XL view cause also ViVa to open?

    Category: Custom IC Design

    By PatrikOsgnach

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    updated over 7 years ago by PatrikOsgnach

    4 replies • 13651 views
  • Discussion

    Measurement of delay between change in value of two buses created using Analog to Digital function

    Category: Custom IC Design

    By prashantpd

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    updated over 7 years ago by Andrew Beckett

    1 replies • 14304 views
  • Discussion

    gpdk045 vth at dcop is not same as model spec

    Category: Custom IC Design

    By rfham

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    updated over 7 years ago by Andrew Beckett

    2 replies • 14057 views
  • Discussion

    how to use variable in parameter sweep

    Category: Custom IC Design

    By sjwprc

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    updated over 7 years ago by Andrew Beckett

    1 replies • 16096 views
  • Discussion

    Monte Carlo: Define instance mismatch correlation in IC61.6/7

    Category: Custom IC Design

    By Majdo

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    updated over 7 years ago by Andrew Beckett

    1 replies • 2178 views
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