Custom IC Design

Latest Posts

Discussion

how to unlink library cells

Category: Custom IC Design

By Claes
•
updated over 14 years ago by skillUser

1 replies • 12867 views
Discussion

How conver libraries from 5141 to 6.1 Cadence

Category: Custom IC Design

By TiNat
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updated over 14 years ago by skillUser

3 replies • 5869 views
Discussion

Problem with LVS, DRC

Category: Custom IC Design

By archive
•
updated over 14 years ago by kamit

5 replies • 14563 views
Discussion

Netname problem

Category: Custom IC Design

By banker
•
updated over 14 years ago by Marc Heise

1 replies • 12944 views
Discussion

ESD protection verification/simulation with virtuoso spectre ?

Category: Custom IC Design

By isazulkc
•
started over 14 years ago

0 replies • 1391 views
Discussion

ICFB. Bindkey.il Select 1 key and make visible 4 different layers. Posible or not?

Category: Custom IC Design

By Ivan de Trble
•
updated over 14 years ago by Ivan de Trble

2 replies • 13328 views
Discussion

display cdsparam through hierarchy

Category: Custom IC Design

By sdtpeo
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started over 14 years ago

0 replies • 12864 views
Discussion

Abstract generator's "database could not create net named" error

Category: Custom IC Design

By mak1
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started over 14 years ago

0 replies • 394 views
Discussion

Writing a waveform and sampled version of that into a file without using ocnPrint

Category: Custom IC Design

By yayla
•
updated over 14 years ago by yayla

9 replies • 23178 views
Discussion

Why OCEAN script produce different analysis result from ADE?

Category: Custom IC Design

By datao
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updated over 14 years ago by Andrew Beckett

7 replies • 15520 views
Discussion

*Error* eval: code size too big inside a construct (32767 max; 32771 given)!

Category: Custom IC Design

By Jameel
•
updated over 14 years ago by Jameel

5 replies • 13934 views
Discussion

help with monte-carlo, ocean xl script

Category: Custom IC Design

By ronis
•
updated over 14 years ago by Andrew Beckett

4 replies • 13648 views
Discussion

how can i print monte-carlo variance(like show in histograms graph)?

Category: Custom IC Design

By ronis
•
updated over 14 years ago by Andrew Beckett

2 replies • 1046 views
Discussion

Dump output data for selected time windows

Category: Custom IC Design

By nmmartins
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updated over 14 years ago by nmmartins

2 replies • 13092 views
Discussion

design logic gate different strength

Category: Custom IC Design

By sam andro
•
updated over 14 years ago by Quek

1 replies • 13066 views

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