• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Functional Verification
CDNS - double leaderboard script

Functional Verification

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    How to make eManager run in "parallel"

    Category: Functional Verification

    By Kobi Y Kobi Y

    •

    updated over 12 years ago by StephenH

    4 replies • 2981 views
  • Discussion

    uninitialized state elements

    Category: Functional Verification

    By BharathECE BharathECE

    •

    updated over 12 years ago by ckomar

    1 replies • 13417 views
  • Discussion

    Create/Import Verilog-AMS Cell View

    Category: Functional Verification

    By Bayes Bayes

    •

    started over 12 years ago

    0 replies • 987 views
  • Discussion

    DIVA LVS Problem After Installing Assura

    Category: Functional Verification

    By eame eame

    •

    updated over 12 years ago by eame

    1 replies • 12976 views
  • Discussion

    run IFV Xcheck property

    Category: Functional Verification

    By BharathECE BharathECE

    •

    updated over 12 years ago by TAM1

    1 replies • 12966 views
  • Discussion

    IFV Dead code check fail

    Category: Functional Verification

    By BharathECE BharathECE

    •

    updated over 12 years ago by ckomar

    1 replies • 13090 views
  • Discussion

    specman clock

    Category: Functional Verification

    By hellohi hellohi

    •

    updated over 12 years ago by hellohi

    3 replies • 14031 views
  • Discussion

    FSM coverage (RTL from CtoS)

    Category: Functional Verification

    By GiuseppeDG GiuseppeDG

    •

    started over 12 years ago

    0 replies • 13068 views
  • Discussion

    Cadence lint HAL tool

    Category: Functional Verification

    By LINT LINT

    •

    started over 12 years ago

    0 replies • 15962 views
  • Discussion

    ATPG for RTL

    Category: Functional Verification

    By GiuseppeDG GiuseppeDG

    •

    started over 12 years ago

    0 replies • 12619 views
  • Discussion

    Warning in Toggle coverage exclusion

    Category: Functional Verification

    By nenu09 nenu09

    •

    started over 12 years ago

    0 replies • 13613 views
  • Discussion

    UniPro eVC integration

    Category: Functional Verification

    By PeterSVerif PeterSVerif

    •

    started over 12 years ago

    0 replies • 12695 views
  • Discussion

    ncsim -out directive

    Category: Functional Verification

    By affaqq affaqq

    •

    updated over 12 years ago by tpylant

    1 replies • 986 views
  • Discussion

    Toggle, block, statement coverage... what else?

    Category: Functional Verification

    By GiuseppeDG GiuseppeDG

    •

    updated over 12 years ago by tpylant

    1 replies • 13457 views
  • Discussion

    Coverage results over the time (RTL)

    Category: Functional Verification

    By GiuseppeDG GiuseppeDG

    •

    updated over 12 years ago by pcarzola

    3 replies • 13521 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information