Mixed-Signal Design

Latest Posts

Discussion

Verilog-A Multiple variables of fixed size

Category: Mixed-Signal Design

By Nick Martin
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started over 10 years ago

0 replies • 12680 views
Discussion

Regarding PTM

Category: Mixed-Signal Design

By VIVEK1729
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updated over 10 years ago by Andrew Beckett

2 replies • 14358 views
Discussion

run index as a parameter in montecarlo simulation

Category: Mixed-Signal Design

By GFernandez
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started over 10 years ago

0 replies • 12757 views
Discussion

RECN in Noise Summary

Category: Mixed-Signal Design

By EricHsu
•
updated over 10 years ago by Andrew Beckett

1 replies • 13796 views
Discussion

How to get the simulation results of internal node in verilog?

Category: Mixed-Signal Design

By xxgenerall
•
updated over 10 years ago by Andrew Beckett

1 replies • 14630 views
Discussion

How to change the ron of D2A IE, please?

Category: Mixed-Signal Design

By xxgenerall
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updated over 10 years ago by Andrew Beckett

1 replies • 13329 views
Discussion

Measuring Drain current using ADE XL

Category: Mixed-Signal Design

By frasheed
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updated over 10 years ago by frasheed

1 replies • 15024 views
Discussion

Simulating Verilog-A modules, including VPI, with Spectre

Category: Mixed-Signal Design

By fgarcia
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updated over 10 years ago by RahulDutta

10 replies • 19415 views
Discussion

HISIM-HV

Category: Mixed-Signal Design

By pejmank
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updated over 10 years ago by Uma Sankar

1 replies • 13704 views
Discussion

MOM or MIM capacitor to use in SAR ADC

Category: Mixed-Signal Design

By Ricardo Alves
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updated over 10 years ago by pksingh

2 replies • 17591 views
Discussion

Encounter layermap file

Category: Mixed-Signal Design

By dNora
•
started over 10 years ago

0 replies • 12737 views
Discussion

Monte Carlo AMS Simulation with ADE-XL not working properly

Category: Mixed-Signal Design

By GabrielB
•
updated over 10 years ago by kapiljainwal

2 replies • 14043 views
Discussion

total resistance plot (load current vs load voltage ) of a sub circuit

Category: Mixed-Signal Design

By Debasish VLSI
•
updated over 10 years ago by Debasish VLSI

2 replies • 15653 views
Discussion

Ring VCO satisfy barkhausen criterion using plot

Category: Mixed-Signal Design

By Debasish VLSI
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updated over 10 years ago by Andrew Beckett

1 replies • 14162 views
Discussion

PPV-based ring VCO plot

Category: Mixed-Signal Design

By Debasish VLSI
•
updated over 10 years ago by Andrew Beckett

1 replies • 13849 views

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