Mixed-Signal Design

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Discussion

Welcome to the Cadence Mixed-Signal Forum!

Category: Mixed-Signal Design

By admin
•
started over 12 years ago

0 replies • 17170 views
Discussion

DC convergence problem with Basic ring amplifier

Category: Mixed-Signal Design

By SC202503236954
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updated 1 day ago by SC202503236954

2 replies • 109 views
Discussion

Attach load to a pin for AMS verification

Category: Mixed-Signal Design

By PedroC
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started 3 days ago

0 replies • 68 views
Discussion

White phase noise in VCO decays with frequency – not flat as expected

Category: Mixed-Signal Design

By brunoalexandrefraga
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updated 1 month ago by Andrew Beckett

1 replies • 454 views
Discussion

Issue on Running simulation with VerilogA and SystemVerilog in virtuoso - Z output

Category: Mixed-Signal Design

By AmirMasnadi
•
updated 1 month ago by engineer27

1 replies • 462 views
Discussion

Illegal argument for signal access function [4.3(AMSLRM)]. Verilog AMS error.

Category: Mixed-Signal Design

By BS20240726490
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updated 1 month ago by Saloni Chhabra

1 replies • 253 views
Discussion

Help with Accurate Extraction of Ron and Coff for RF Switches in Ku-Band Phase Shifter Design

Category: Mixed-Signal Design

By BR202502181318
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started 3 months ago

0 replies • 1004 views
Discussion

Phase Interpolator Control

Category: Mixed-Signal Design

By JS20250531815
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started 3 months ago

0 replies • 920 views
Discussion

Netlisting error

Category: Mixed-Signal Design

By PE202503078250
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started 3 months ago

0 replies • 1405 views
Discussion

wreal modeling for inductance and capacitance

Category: Mixed-Signal Design

By LS202412014215
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updated 5 months ago by LS202412014215

2 replies • 1737 views
Discussion

Deepprobe to connect to a bus (extracted view)

Category: Mixed-Signal Design

By Macio
•
updated 5 months ago by Frank Wiedmann

1 replies • 1931 views
Discussion

Layout with MODGEN on resistor interdigitated matching

Category: Mixed-Signal Design

By RH20250306711
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started 5 months ago

0 replies • 1471 views
Discussion

Modifying AMS netlist at command line before running a simulation

Category: Mixed-Signal Design

By PedroC
•
updated 6 months ago by PedroC

6 replies • 3314 views
Discussion

Loading Effect of Digital circuits on Analog Circuits in AMS Sims

Category: Mixed-Signal Design

By AhmedAtef
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started 7 months ago

0 replies • 1823 views
Discussion

Assura LVS failed for Mixed-signal design

Category: Mixed-Signal Design

By SaranyaBalan
•
updated 7 months ago by SaranyaBalan

2 replies • 2221 views

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