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PCB Design

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

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Latest Posts

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  • Discussion

    Lower case letters for schematic capture

    Category: PCB Design

    By budz

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    updated over 12 years ago by steve

    3 replies • 14599 views
  • Discussion

    Where are all the classes/sub classes gone for "Dimension in 16.5, 16.6" ?

    Category: PCB Design

    By ScottCad

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    •

    updated over 12 years ago by ScottCad

    3 replies • 1382 views
  • Discussion

    Board expansion error

    Category: PCB Design

    By raul5565

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    •

    started over 12 years ago

    0 replies • 12395 views
  • Discussion

    Merging of PADs with Ground plane

    Category: PCB Design

    By raul5565

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    •

    updated over 12 years ago by raul5565

    2 replies • 14298 views
  • Discussion

    Stroke command w/o holding ctrl button?

    Category: PCB Design

    By budz

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    •

    updated over 12 years ago by budz

    2 replies • 1282 views
  • Discussion

    Routing in 16.6

    Category: PCB Design

    By Roger G

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    •

    updated over 12 years ago by ScottCad

    1 replies • 12964 views
  • Discussion

    Through Hole, both side routing.

    Category: PCB Design

    By raul5565

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    •

    updated over 12 years ago by raul5565

    2 replies • 12740 views
  • Discussion

    donut pad shape

    Category: PCB Design

    By nathan2009

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    •

    updated over 12 years ago by KEN13

    5 replies • 15096 views
  • Discussion

    Shape selection

    Category: PCB Design

    By ScottCad

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    •

    updated over 12 years ago by ScottCad

    4 replies • 13500 views
  • Discussion

    OrCAD 16.3 dsn Format is not opening?

    Category: PCB Design

    By Dhamodharann

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    •

    updated over 12 years ago by oldmouldy

    1 replies • 13504 views
  • Discussion

    Artwork Log Message(Photoplot outline rectangle not found)

    Category: PCB Design

    By raul5565

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    •

    updated over 12 years ago by raul5565

    8 replies • 11289 views
  • Discussion

    Output impedance of a buffer

    Category: PCB Design

    By tltoth

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    •

    updated over 12 years ago by tltoth

    2 replies • 13547 views
  • Discussion

    Sanity Check how do I Compare netlist from capture and Allegro.

    Category: PCB Design

    By ScottCad

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    •

    updated over 12 years ago by ScottCad

    2 replies • 14341 views
  • Discussion

    no rats showing after running netlist in Capture??? **HELP***

    Category: PCB Design

    By pitbull107

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    •

    updated over 12 years ago by pitbull107

    2 replies • 13200 views
  • Discussion

    How to change component class (OrCAD Signal Explorer)

    Category: PCB Design

    By tltoth

    $usertype

    •

    updated over 12 years ago by tltoth

    4 replies • 14278 views
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