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Latest Blog Posts

  • System, PCB, & Package Design : How many DEHDL (Concept) designers customize their DEHDL environment?

    Jerry GenPart
    Jerry GenPart

    I'm curious with the availablity within DEHDL (ConceptHDL) of customizing the menus, toolbars, and softkey assignments, how many designers or site adminstrators customize their environment. Do you just add a few menu items or minor adjustments to the toolbars, or do you do quite a bit of customization? How much do you find it improving your efficiency using the product?

    There are several designers who take advantage…

    • 11 Jul 2008
  • Verification: 'Verification Acceleration' vs. 'Simulation Acceleration'

    Anonymous
    Anonymous

    Simulation acceleration and emulation technology has been commonly used to run faster large blocks and system level configurations and to verify software against very fast and accurate RTL hardware model. With current system design capacities in the multi millions gates, simulating these designs at 100 -100,000 times the speed of a simulator provides already a huge benefit to system verification teams across the globe…

    • 11 Jul 2008
  • System, PCB, & Package Design : Which SPB customers will be attending CDNLive! 2008 in San Jose?

    Jerry GenPart
    Jerry GenPart

    While I've attended a few Cadence Corporate User Group events over the past years, as well as originated the local Cadence North-Central User's Group (CNUG) here in the Chicago area (oh boy -- that was some time back...), I'm very excited to be attending this year's CDNLive! event in San Jose this coming September.

    I'm hoping to meet many customers using the SPB products - the veterans who've I've worked…

    • 11 Jul 2008
  • System, PCB, & Package Design : Lack of design-chain collaboration prevents SiP to go mainstream

    archive
    archive

    A few years back, I was considering that the lack of an integrated design solution (tool flow) was the reason that SiP design was an "expert engineering" process -- and why it was not adopted more widely despite its benefits over SoC integration for a broad range of applications and markets.

    However, since the initial release of our SiP solution (http://www.cadence.com/products/sip/index.aspx) a while back, and…

    • 11 Jul 2008
  • RF Engineering: Cadence, the new kid on the Electromagnetic Solver Block

    Kabir
    Kabir

    On June 16 2008, Cadence introduced a new Electromagnetic (EM) solver technology to address the challenges of verifying wireless integrated circuits implemented in advanced CMOS process nodes. You can read the press release here.

    How is this going to help the RF designer?  Virtuoso® RF Designer brings a fast planar 3D EM solver to the designer's desktop. With its NlogN speed (where N is the number of unknowns), higher…

    • 11 Jul 2008
  • Verification: ESL handoff: closer than you think

    Ran Avinun
    Ran Avinun

    Take a look at the article linked below, titled: "ESL handoff: closer than you think."

    It's by Michael "Mac" McNamara, a colleague here at Cadence -- and a fellow blogger.

    Read the article here. Share your thoughts below.

    • 10 Jul 2008
  • Verification: Dreaming in Code

    jasona
    jasona

    One of the best books I read this year is called Dreaming in Code by Scott Rosenberg. I spotted this gem at the local public library sandwiched among some old books about Visual Basic and how to use Microsoft Office. The subtitle "Two Dozen Programmers, Three Years, 4.732 Bugs, and One Quest for Transcendent Software", definitely caught my eye. It is now available in paperback and is well worth the minimal cost.

    As…

    • 10 Jul 2008
  • Verification: Do you want to buy my chip?

    jasona
    jasona

    Once upon a time semiconductor companies produced a chip, made a data sheet, showed the data sheet to customers, provided samples for customers to try, and followed up to see if the customers wanted to buy the chip.

    That was then, this is now. In today's SoC world, semiconductor companies must not only produce chips, they also need to put the chip on a board and develop all of the representative software for the application…

    • 12 Jun 2008
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