Featured

Arm Zena CSS – Accelerating Chiplet-Based SoC Design for AI-Defined Vehicles

Cadence is collaborating with Arm on their groundbreaking first-generation compute…

Robert
• 6 min read
virtual prototyping , ucie , featured , chiplet , virtual platform

Symmetric Multiprocessing (SMP) RTOS on Xtensa Multicore

An increasing number of multi-threaded embedded applications want to leverage multicore…

Nayan Gaywala
• 8 min read
featured , Symmetric Multiprocessing , SMP , Tensilica , FreeRTOS

Accelerate Your Automotive, Consumer, and Data Center Semiconductor Projects

Semiconductor innovation is the driving force behind groundbreaking advancements…

Corporate
• 3 min read
Automotive , featured , CES , Tensilica
SoC and IP

Latest blogs

Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem

Cadence tapes out 32G UCIe interface IP for high speed, highly efficient chiplet…

MBhatnagar
• 4 min read
ucie , IP , die-to-die

Locking When Emulating Xtensa LX Multi-Core on a Xilinx FPGA

Today's high-performance computing systems often require the designer to instantiate…

Nayan Gaywala
• 4 min read
AXI , Tensilica , Xtensa , FPGA

DDR5 12.8Gbps MRDIMM IP: Powering the Future of AI, HPC, and Data Centers

The demand for higher-performance computing is greater than ever. Cutting-edge applications…

Kos Gitchev
• 2 min read
ddr5 , Design IP , IP , gddr6 , PHY , 3nm , MRDIMM , GDDR , memory IP , Denali , Design IP and Verification IP , DDR

GDDR7: The Ideal Memory Solution in AI Inference

The generative AI market is experiencing rapid growth, driven by the increasing parameter…

Frank Ferro
• 3 min read
featured , gddr6 , inference , HBM , training , AI , GDDR7

HBM3E: All About Bandwidth

The rapid rise in size and sophistication of AI/ML training models requires increasingly…

Frank Ferro
• 2 min read
featured , HBM , hbm4 , SerDes

How Cadence Is Revolutionizing Automotive Sensor Fusion

The automotive industry is currently on the cusp of a radical evolution, steering…

Vinod Khera
• 5 min read
Automotive , Sensor Processing , sensor fusion , Automotive SoC , automotive IP , NPU , AI

Are You SAFE Yet? Leveraging the Ecosystem to Boost Your Product Time to Market

We live in a rapidly growing “digitalized world,” with an ever-increasing need for…

William Chen
• 2 min read
IP , featured , Silicon Solution Group , PCIe 5.0 , samsung foundry , PCIe , SSG , PCIe 6.0 , safe , PCI Express , Protocol IP

Navigating Chiplet-Based Automotive Electronics Design with Advanced Tools and F…

In the rapidly evolving landscape of automotive electronics, traditional monolithic…

Reela
• 6 min read
Automotive , electronics , chiplets , tools and flows

Cadence Showcases World's First 128GT/s PCIe 7.0 IP Over Optics

PCI-SIG DevCon 2024 was a great success for Cadence. We posted the blog, Cadence…

GautamS
• 2 min read
Design IP , IP , featured , PHY , 128 GT/s , PCIe 7.0 , PCIe , Optics , SerDes , SerDes IP

How Cadence Is Expanding Innovation for 3D-IC Design

The market is trending towards integrating and stacking multiple chiplets into a…

Vinod Khera
• 5 min read

Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24

PCI-SIG DevCon 2024 – 32 nd Anniversary For more than a decade, Cadence has been…

GautamS
• 6 min read
Design IP , IP , PHY , PCIe 7.0 , PCIe , semiconductor IP , SerDes , PCI Express , PCI-SIG

Chiplet Integration in the Automotive Realm

As technology continues to advance, the automotive industry is rapidly transforming…

Reela
• 4 min read
Automotive , ucie , chiplets , 3D-IC , design flow , d2d , verification

Cadence San Jose Hosts JEDEC LPDDR (Low-Power DDR) Task Group Meeting

Low-power DDR (LPDDR ) SDRAM has been one of the most widely used memories in the…

Shyam Sharma
• 1 min read
Verification IP , ddr5 , IP , JEDEC , HBM , GDDR , memory IP , DRAM , lpddr5 , lpddr5x , memory models

UCIe and Automotive Electronics: Pioneering the Chiplet Revolution

The automotive industry stands at the brink of a profound transformation fueled by…

Vinod Khera
• 5 min read
ucie , IP , ip cores , Tensilica

Celebrating World Intellectual Property Day

LEGO ® is the world’s most famous toy brand. The experience of playing with these…

Arif Khan
• 1 min read
Design IP , IP

Intel and Cadence Partner to Build Out the Foundry Ecosystem in America

As a result of the largest public-private investment ever made in the U.S. semiconductor…

GautamS
• 3 min read
CXL , IP , featured , PCIe 5.0 , PCIe , CHIPS and Science Act , Silicon Solutions Group , Intel Foundry

Revolution on the Road: How Cadence is Driving the Future of Automotive Design!

The automotive industry is at a crucial inflection point, pivoting from traditional…

Vinod Khera
• 8 min read
functional safety , Automotive Solutions , infotainment , autonomous driving , Automotive Ethernet , automotive IP , ADAS

Cadence Sets the Gold Standard for UCIe Connectivity at Chiplet Summit '24

Cadence Demonstrated first silicon in UCIe during Chiplet Summit 2024. The demo showed…

MBhatnagar
• 3 min read
ucie , UltraLink , IP , die-to-die , d2d

UCIe Interoperability Between Intel and Cadence

Intel and Cadence are collaborating on an initiative to demonstrate interoperability…

SFUNG
• 3 min read
ucie , chiplets , IP integration , semiconductor IP , Design IP and Verification IP

Cadence is a Contributing UCIe Consortium Member

This blog was originally posted on uciexpress.org . The Cadence member spotlight…

SFUNG
• 5 min read
ucie , chiplets , Design IP and Verification IP

Cadence Targets Automotive Market Demands with UCIe

Cadence has become a contributor-level member of the Automotive Working Group in…

SFUNG
• 2 min read
ucie , IP , chiplets , Design IP and Verification IP

How Do Robots Navigate?

Have you ever been amazed by the graceful movement of robots and self-driving vehicles…

Vinod Khera
• 4 min read
ip cores , Tensilica , VSLAM

Cadence Perspective: 224G SerDes Trend and Solution

As an industry early mover to support the emerging 800G/1.6T networks, Cadence taped…

YangZhang
• 4 min read
LLM

Cadence Showcases PCIe 7.0-Ready IP at PCI-SIG Developers Conference 2023

PCIe 7.0 continues to progress through draft stage, IP enablement begins The PCI…

Arif Khan
• 2 min read
Design IP , IP , PHY , semiconductor IP , SerDes , PCI Express , PCI-SIG

Cadence Collaboration with Kudan and Visionary.ai Enables Rapid Deployment of VSLAM…

Are you confused while navigating new environments, especially in less optimum light…

Vinod Khera
• 5 min read
Visionary.ai , SLAM , Tensilica , vision , Kudan

Cadence Demonstrates 112G-ELR SerDes IP on TSMC’s 3nm Process Technology

The 3nm wave of technology is here! Cadence is proud to demonstrate its 112G Extended…

Vinod Khera
• 2 min read
featured , 112g , SerDes IP

The Five Must-Have Features of Modern Automotive SoC Architectures

Groundbreaking innovations demand state-of-the-art system-on-chip (SoC) architectures…

Ericles Sousa
• 3 min read
security , Automotive , Low Power , featured , Safety , system-on-chip , predictability , real-time processor , architectures , high performance , connectivity

FMEDA-Driven SoC Design of Safety-Critical Semiconductors

Written by Francesco Lertora and Robert Schweiger 1.1 Introduction The growing…

Robert
• 8 min read
Safety Solution , Genus , functional safety , Midas Safety Platform , featured , Xcelium Safety , Jasper FSV , Verisium Manager Safety , USF , Automotive Option , Safety Analysis , Innovus , FMEDA , ISO 26262 , Virtuoso Assembler , Unified Safety Format , Safety Verification , Safety Compliance , Legato Reliability , Safety-aware Implementation
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