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Custom IC Design

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  • Discussion

    Set the user interface to have the assistants hidden by default

    Category: Custom IC Design

    By greywanderer

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    updated over 4 years ago by greywanderer

    2 replies • 10498 views
  • Discussion

    How can I find the voltage difference between two nodes?

    Category: Custom IC Design

    By yysunj

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    updated over 4 years ago by yysunj

    2 replies • 14578 views
  • Discussion

    How Can I Pass a Variable-sized Array to an Analog User-defined Function in VerilogA?

    Category: Custom IC Design

    By rhanna

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    updated over 4 years ago by Andrew Beckett

    1 replies • 13318 views
  • Discussion

    About User Command-Line Options in Environment Options

    Category: Custom IC Design

    By ichiro

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    updated over 4 years ago by Andrew Beckett

    7 replies • 19688 views
  • Discussion

    Export simulation results in excel file

    Category: Custom IC Design

    By Holz

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    updated over 4 years ago by Holz

    2 replies • 12275 views
  • Discussion

    Removing mouse auto default to "Ok" in pop up dialogue within Virtuoso

    Category: Custom IC Design

    By blankman

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    updated over 4 years ago by Frank Wiedmann

    2 replies • 1674 views
  • Discussion

    How much storage does a single simulation use?

    Category: Custom IC Design

    By Holz

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    updated over 4 years ago by Holz

    2 replies • 10784 views
  • Discussion

    ADE Assembler Message 1921 - When running multiple sweep points

    Category: Custom IC Design

    By Christos Skoufis

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    updated over 4 years ago by Christos Skoufis

    6 replies • 8731 views
  • Discussion

    recognize paths with metal jumps using DIVA

    Category: Custom IC Design

    By strotta

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    updated over 4 years ago by Andrew Beckett

    1 replies • 10436 views
  • Discussion

    Mu and Mu_prime in S parameter analysis

    Category: Custom IC Design

    By Abhinav2020

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    updated over 4 years ago by Frank Wiedmann

    4 replies • 17142 views
  • Discussion

    How can you move/stretch schematic wires WITHOUT Virtuoso rerouting everything and making a mess?

    Category: Custom IC Design

    By CADcasualty

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    updated over 4 years ago by mmsaad66

    2 replies • 5628 views
  • Discussion

    Transient stop time for specified number of clocks

    Category: Custom IC Design

    By Senan

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    updated over 4 years ago by Andrew Beckett

    7 replies • 15334 views
  • Discussion

    How to flatten GDS by stream out or Command

    Category: Custom IC Design

    By MollyMeow

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    updated over 4 years ago by MollyMeow

    2 replies • 11559 views
  • Discussion

    Environment variable questions

    Category: Custom IC Design

    By sjwprcker

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    updated over 4 years ago by sjwprcker

    2 replies • 11221 views
  • Discussion

    Simulating with a Calibre Extracted Netlist with ADE Explorer

    Category: Custom IC Design

    By jshumble

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    updated over 4 years ago by jshumble

    3 replies • 13466 views
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