Custom IC Design

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Diva drcAntenna cumulative check

Category: Custom IC Design

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updated over 19 years ago by archive

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Beat frequency in SpectreRF PSS simulation

Category: Custom IC Design

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updated over 19 years ago by archive

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neocell

Category: Custom IC Design

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updated over 19 years ago by archive

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Using GTE in PAS 3.1 for generating PDKs?

Category: Custom IC Design

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started over 19 years ago

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Impedance setting for ports in Spectre

Category: Custom IC Design

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updated over 19 years ago by archive

4 replies • 18457 views
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Cadence IC5.141 with NCSU design kit 1.2 or 1.5

Category: Custom IC Design

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updated over 19 years ago by archive

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how does hiCreateInst work for pcells?

Category: Custom IC Design

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updated over 19 years ago by archive

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leiHiCopy ?

Category: Custom IC Design

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updated over 19 years ago by archive

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Error while extracting layout.

Category: Custom IC Design

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updated over 19 years ago by archive

5 replies • 15941 views
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LVS and "selfmade" mosfet layout in VXL

Category: Custom IC Design

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updated over 19 years ago by archive

2 replies • 7406 views
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Porting systems (layout) from one technology to another ?

Category: Custom IC Design

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started over 19 years ago

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How to use vcvsp with multiple inputs

Category: Custom IC Design

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updated over 19 years ago by archive

1 replies • 16416 views
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Defining Spacing Rules inside the technology file

Category: Custom IC Design

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updated over 19 years ago by archive

2 replies • 14613 views
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How to bind spectre netlist to symbol in schematic

Category: Custom IC Design

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updated over 19 years ago by archive

5 replies • 18142 views
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how inherit parameters (w, l and mi) of schematic to layout pcell?

Category: Custom IC Design

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updated over 19 years ago by archive

4 replies • 15341 views

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