• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    How to simulate initial condition for post-layout simulation?

    Category: Custom IC Design

    By BaaB

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 14911 views
  • Discussion

    Problem in Monte Carlo with XPS MS

    Category: Custom IC Design

    By rsashwinkumar

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 14728 views
  • Discussion

    Simulate all possible value of a MOSFET threshold voltage

    Category: Custom IC Design

    By BaaB

    $usertype

    •

    updated over 9 years ago by BaaB

    4 replies • 15278 views
  • Discussion

    How to parameterize a string parameter in ADE XL?

    Category: Custom IC Design

    By rickyuexu

    $usertype

    •

    started over 9 years ago

    0 replies • 14044 views
  • Discussion

    Assura QRC Error

    Category: Custom IC Design

    By sdineshkumar

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    3 replies • 16569 views
  • Discussion

    select master cell in ADEXL

    Category: Custom IC Design

    By Clidre

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 13445 views
  • Discussion

    Extracting Interconnect Parameters

    Category: Custom IC Design

    By rafaelon

    $usertype

    •

    updated over 9 years ago by rafaelon

    2 replies • 13850 views
  • Discussion

    Error during the RC extraction using 45 nm technology

    Category: Custom IC Design

    By vinod joshi

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 13777 views
  • Discussion

    lineread command error out when trying to read a verilog generation log file

    Category: Custom IC Design

    By mlea

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 13897 views
  • Discussion

    Pass Path and Filename via Variable in ADEXL

    Category: Custom IC Design

    By SebastianS

    $usertype

    •

    started over 9 years ago

    0 replies • 15182 views
  • Discussion

    "FATAL: Insufficient memory available" spectre issue

    Category: Custom IC Design

    By Dresdener

    $usertype

    •

    updated over 9 years ago by Dresdener

    2 replies • 6648 views
  • Discussion

    Help with Verilog-A file operation tasks

    Category: Custom IC Design

    By Reks

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 14814 views
  • Discussion

    Sweep vth values

    Category: Custom IC Design

    By syafiq

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    4 replies • 14442 views
  • Discussion

    preferred way to sweep temperature in ADEXL

    Category: Custom IC Design

    By danmc91

    $usertype

    •

    updated over 9 years ago by Andrew Beckett

    1 replies • 22139 views
  • Discussion

    Oscillator frequency discrepancy between PSS and transient simulation

    Category: Custom IC Design

    By Juanelin

    $usertype

    •

    updated over 9 years ago by Juanelin

    2 replies • 15538 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information