Custom IC Design

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Discussion

Importing schematics and layout of io pads into Cadence Virtuoso

Category: Custom IC Design

By AP202512029534

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updated 18 days ago by Andrew Beckett

1 replies • 668 views
Discussion

Problem with ADE Explorer and spectre_encrypt (IC 21.1 ISR22)

Category: Custom IC Design

By GL202502244954

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updated 19 days ago by Andrew Beckett

2 replies • 2779 views
Discussion

av_extracted to dispf/idspf conversion

Category: Custom IC Design

By msharma

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updated 19 days ago by Andrew Beckett

5 replies • 1423 views
Discussion

plotting results does not properly work

Category: Custom IC Design

By TommasoF

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updated 21 days ago by Leandro Silva

15 replies • 4736 views
Discussion

How can i monitor net voltages in asserts

Category: Custom IC Design

By Purbayan

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updated 22 days ago by Andrew Beckett

1 replies • 680 views
Discussion

FATAL: The following branches form a loop of rigid branches (short) when added to the circuit

Category: Custom IC Design

By TS20260112292

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started 23 days ago

0 replies • 509 views
Discussion

PVS LVS with added external netlist

Category: Custom IC Design

By GBlasco

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updated 24 days ago by GBlasco

2 replies • 878 views
Discussion

How display SOA report of simulation in ADE

Category: Custom IC Design

By Phd SA88

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started 24 days ago

0 replies • 513 views
Discussion

ADE assembler: How to change packed probe limit for the AMS simulator (xcelium) ?

Category: Custom IC Design

By MC20250412421

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updated 24 days ago by MC20250412421

2 replies • 903 views
Discussion

Graph window size in VIVA using OCEAN

Category: Custom IC Design

By msharma

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updated 24 days ago by msharma

2 replies • 819 views
Discussion

PSS + PAC analysis of a parametric amplifier

Category: Custom IC Design

By GL202502244954

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started 24 days ago

0 replies • 526 views
Discussion

Issue while performing signoffTimeDesign in Innovus

Category: Custom IC Design

By VLSI lab IITB

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updated 24 days ago by VLSI lab IITB

2 replies • 843 views
Discussion

Save multiple values versus frequency using spectremdl for spectre version 2016

Category: Custom IC Design

By GM202510215619

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updated 25 days ago by GM202510215619

2 replies • 949 views
Discussion

Issue: SKILL Script Creates Schematic and Symbol But Ports Are Missing

Category: Custom IC Design

By Mooh

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updated 26 days ago by Mooh

2 replies • 931 views
Discussion

Parasitic capacitance

Category: Custom IC Design

By SamanMKD

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updated 27 days ago by Andrew Beckett

3 replies • 1089 views

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