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Custom IC Design

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  • Discussion

    How to recover an unsaved parametric simulation in ADE-L

    Category: Custom IC Design

    By ronaldomponte

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    updated over 11 years ago by Andrew Beckett

    1 replies • 13899 views
  • Discussion

    from a circuit into a layout - Help

    Category: Custom IC Design

    By 468191

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    updated over 11 years ago by Marc Heise

    1 replies • 689 views
  • Discussion

    parameterize voltage source in Virtuoso

    Category: Custom IC Design

    By gnaw

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    updated over 11 years ago by gnaw

    2 replies • 17639 views
  • Discussion

    SKILL global replace layer within ROD multipart-path

    Category: Custom IC Design

    By archive

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    •

    updated over 11 years ago by Andrew Beckett

    5 replies • 15507 views
  • Discussion

    Ploting RDSon against W and Vgs

    Category: Custom IC Design

    By Pyroblast

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    •

    started over 11 years ago

    0 replies • 13508 views
  • Discussion

    model card vith a verilogA model through spectre

    Category: Custom IC Design

    By Fabb

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    updated over 11 years ago by Fabb

    11 replies • 24023 views
  • Discussion

    changing toolbar in ic615

    Category: Custom IC Design

    By letcan

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    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 13649 views
  • Discussion

    Driving an internal node several heirarchical layers down...

    Category: Custom IC Design

    By deklein

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    updated over 11 years ago by Andrew Beckett

    1 replies • 16075 views
  • Discussion

    Disable "Save Display Information" form

    Category: Custom IC Design

    By Octavian

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    updated over 11 years ago by Andrew Beckett

    3 replies • 2249 views
  • Discussion

    Problem using QRC with Calibre input

    Category: Custom IC Design

    By mbhealy

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    •

    updated over 11 years ago by Quek

    9 replies • 20880 views
  • Discussion

    Example Ocean measurement file in ADEXL

    Category: Custom IC Design

    By BradW

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    updated over 11 years ago by Andrew Beckett

    4 replies • 16496 views
  • Discussion

    Does Cadence 6.1.5 support SpectreVerilog simulator?

    Category: Custom IC Design

    By ericliu

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    updated over 11 years ago by Quek

    3 replies • 14625 views
  • Discussion

    cdsRemsh ignores "ssh" setting .cdsenv

    Category: Custom IC Design

    By kitmonisit

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    updated over 11 years ago by vader

    4 replies • 3733 views
  • Discussion

    issue with dcmatch simulation

    Category: Custom IC Design

    By sarfraz

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    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 18601 views
  • Discussion

    problem on simulating the Rflib components

    Category: Custom IC Design

    By ROHIT DWIVEDI

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    •

    updated over 11 years ago by Andrew Beckett

    7 replies • 17860 views
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