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Custom IC Design

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  • Discussion

    Connecting PMOS body to VSS! in Layout XL

    Category: Custom IC Design

    By Demi Demi

    •

    updated over 4 years ago by Quek

    1 replies • 19109 views
  • Discussion

    "the following branches form a loop of rigid branches"

    Category: Custom IC Design

    By Jose Sarmento Jose Sarmento

    •

    updated over 4 years ago by Jose Sarmento

    2 replies • 3264 views
  • Discussion

    VerilogA $limit with spectre

    Category: Custom IC Design

    By camilloS camilloS

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 10361 views
  • Discussion

    Using variables with spectrumMeas

    Category: Custom IC Design

    By Rob Gregoire Rob Gregoire

    •

    started over 4 years ago

    0 replies • 9911 views
  • Discussion

    Automatically Export Spectre AMS-Output-Data

    Category: Custom IC Design

    By FloPro FloPro

    •

    updated over 4 years ago by FloPro

    2 replies • 11041 views
  • Discussion

    ddt() at a certain timestep in Verilog-A

    Category: Custom IC Design

    By rhanna rhanna

    •

    updated over 4 years ago by Andrew Beckett

    11 replies • 15874 views
  • Discussion

    Layout XL generating MOS without source contacts.

    Category: Custom IC Design

    By hesdeadJim hesdeadJim

    •

    updated over 4 years ago by henker

    2 replies • 11578 views
  • Discussion

    Is there a way to exclude vias when highlighting nets using Net Tracer on Virtuoso?

    Category: Custom IC Design

    By Tom Sawyer Tom Sawyer

    •

    started over 4 years ago

    0 replies • 9910 views
  • Discussion

    can analog pad be used as power pad (power is ac sinosuid)

    Category: Custom IC Design

    By Her1 Her1

    •

    updated over 4 years ago by Her1

    6 replies • 11625 views
  • Discussion

    HB Analysis on PLL

    Category: Custom IC Design

    By fortune100worse fortune100worse

    •

    updated over 4 years ago by Andrew Beckett

    20 replies • 23076 views
  • Discussion

    How to update schematic without layout

    Category: Custom IC Design

    By AlexST AlexST

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 10039 views
  • Discussion

    ADE XL simluation stuck

    Category: Custom IC Design

    By Holz Holz

    •

    updated over 4 years ago by FormerMember

    5 replies • 14949 views
  • Discussion

    Virtuoso Spice In Device Map property is not honored

    Category: Custom IC Design

    By Nader Fathy Nader Fathy

    •

    updated over 4 years ago by Nader Fathy

    6 replies • 19679 views
  • Discussion

    Layout offgrid problem

    Category: Custom IC Design

    By Senan Senan

    •

    updated over 4 years ago by Senan

    4 replies • 16613 views
  • Discussion

    Naming a net with repetitively with same net name in schematic?

    Category: Custom IC Design

    By nvyayla nvyayla

    •

    updated over 4 years ago by JaydeepDalwadi

    3 replies • 17395 views
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