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Custom IC Design

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  • Discussion

    Automated way for creating custom layout cell view for polygon shapes

    Category: Custom IC Design

    By sidm sidm

    •

    updated over 4 years ago by sidm

    4 replies • 11092 views
  • Discussion

    Spectre terminated due to fatal error

    Category: Custom IC Design

    By SSRRaayy SSRRaayy

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 12066 views
  • Discussion

    some questions after using abConvertComponentParams.il to do schematic porting

    Category: Custom IC Design

    By ringamp ringamp

    •

    updated over 4 years ago by Andrew Beckett

    5 replies • 11925 views
  • Discussion

    Cannot plot transient response (no graph/empty window)

    Category: Custom IC Design

    By hikotoshi hikotoshi

    •

    updated over 4 years ago by yysunj

    22 replies • 13528 views
  • Discussion

    DRC DIVA. How can I solve this marker text: "Space to three adjacent Contacts ( < 0.10um apart) >= 0.08 um"?

    Category: Custom IC Design

    By VictorArzate VictorArzate

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 2052 views
  • Discussion

    Running AMS netlist from unix terminal

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 4 years ago by RFStuff

    10 replies • 14729 views
  • Discussion

    importing spice model into cadence virtuoso ic design

    Category: Custom IC Design

    By Hazem Al Indari Hazem Al Indari

    •

    updated over 4 years ago by Andrew Beckett

    7 replies • 15379 views
  • Discussion

    how to temporary short together bus in schematic for lvs

    Category: Custom IC Design

    By hesaliveJim hesaliveJim

    •

    updated over 4 years ago by hesaliveJim

    4 replies • 12307 views
  • Discussion

    What is meant by "device parameterization" in relation to "ignoreDesignChangesRun" limitation discussed in ADE user guide?

    Category: Custom IC Design

    By jehh jehh

    •

    updated over 4 years ago by jehh

    2 replies • 865 views
  • Discussion

    Print high-resolution layout image in cadence virtuoso

    Category: Custom IC Design

    By srour srour

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 14217 views
  • Discussion

    Abstract generator gdsii file import problem

    Category: Custom IC Design

    By Dinesh Varma4 Dinesh Varma4

    •

    updated over 4 years ago by Quek

    6 replies • 15509 views
  • Discussion

    [LVS Error] Missing ME1_PSUB via

    Category: Custom IC Design

    By iamKarthikBK iamKarthikBK

    •

    updated over 4 years ago by iamKarthikBK

    9 replies • 13990 views
  • Discussion

    What is the difference between pmos, pmoshiv, pmos3, and pmostie in Cadence gpdk018?

    Category: Custom IC Design

    By SimbaG SimbaG

    •

    updated over 4 years ago by SimbaG

    2 replies • 12093 views
  • Discussion

    Netlisting flowchart postFunc called multiple times with Assembler & ICRP job control

    Category: Custom IC Design

    By smikes smikes

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 991 views
  • Discussion

    Dynamic tolerance with Spectre X?

    Category: Custom IC Design

    By smikes smikes

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11718 views
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